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A8.6.315 VLD3 (single 3-element structure to all lanes)

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The a bit must be encoded as 0.

rdar://problem/9292625


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129618 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Johnny Chen 2011-04-15 22:49:08 +00:00
parent fc693036a4
commit a704bc9354
2 changed files with 17 additions and 0 deletions
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6
lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
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@ -2683,6 +2683,12 @@ static bool DisassembleNLdSt(MCInst &MI, unsigned Opcode, uint32_t insn,
// Now we can calculate the alignment! // Now we can calculate the alignment!
if (a) if (a)
alignment = elem * data_size; alignment = elem * data_size;
} else {
if (a) {
// A8.6.315 VLD3 (single 3-element structure to all lanes)
// The a bit must be encoded as 0.
return false;
}
} }
} else { } else {
// Multiple n-element structures with type encoded as Inst{11-8}. // Multiple n-element structures with type encoded as Inst{11-8}.

11
test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt Normal file
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@ -0,0 +1,11 @@
# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding}
# Opcode=871 Name=VLD3DUPd32_UPD Format=ARM_FORMAT_NLdSt(30)
# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
# -------------------------------------------------------------------------------------------------
# | 1: 1: 1: 1| 0: 1: 0: 0| 1: 0: 1: 0| 0: 0: 1: 0| 0: 0: 1: 0| 1: 1: 1: 0| 1: 0: 0: 1| 0: 0: 1: 0|
# -------------------------------------------------------------------------------------------------
#
# A8.6.315 VLD3 (single 3-element structure to all lanes)
# The a bit must be encoded as 0.
0xa2 0xf9 0x92 0x2e