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X86 asm parser: Avoid duplicating the list of aliased instructions
No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214364 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -2302,27 +2302,22 @@ bool X86AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
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// FIXME: This should be replaced with a real .td file alias mechanism.
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// FIXME: This should be replaced with a real .td file alias mechanism.
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// Also, MatchInstructionImpl should actually *do* the EmitInstruction
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// Also, MatchInstructionImpl should actually *do* the EmitInstruction
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// call.
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// call.
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if (Op.getToken() == "fstsw" || Op.getToken() == "fstcw" ||
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const char *Repl = StringSwitch<const char *>(Op.getToken())
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Op.getToken() == "fstsww" || Op.getToken() == "fstcww" ||
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.Case("finit", "fninit")
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Op.getToken() == "finit" || Op.getToken() == "fsave" ||
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.Case("fsave", "fnsave")
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Op.getToken() == "fstenv" || Op.getToken() == "fclex") {
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.Case("fstcw", "fnstcw")
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.Case("fstcww", "fnstcw")
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.Case("fstenv", "fnstenv")
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.Case("fstsw", "fnstsw")
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.Case("fstsww", "fnstsw")
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.Case("fclex", "fnclex")
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.Default(nullptr);
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if (Repl) {
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MCInst Inst;
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MCInst Inst;
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Inst.setOpcode(X86::WAIT);
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Inst.setOpcode(X86::WAIT);
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Inst.setLoc(IDLoc);
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Inst.setLoc(IDLoc);
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if (!MatchingInlineAsm)
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if (!MatchingInlineAsm)
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EmitInstruction(Inst, Operands, Out);
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EmitInstruction(Inst, Operands, Out);
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const char *Repl = StringSwitch<const char *>(Op.getToken())
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.Case("finit", "fninit")
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.Case("fsave", "fnsave")
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.Case("fstcw", "fnstcw")
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.Case("fstcww", "fnstcw")
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.Case("fstenv", "fnstenv")
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.Case("fstsw", "fnstsw")
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.Case("fstsww", "fnstsw")
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.Case("fclex", "fnclex")
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.Default(nullptr);
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assert(Repl && "Unknown wait-prefixed instruction");
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Operands[0] = X86Operand::CreateToken(Repl, IDLoc);
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Operands[0] = X86Operand::CreateToken(Repl, IDLoc);
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}
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}
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