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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-01 00:11:00 +00:00
Remove unused private fields found by clang's new -Wunused-private-field.
There are some that I didn't remove this round because they looked like obvious stubs. There are dead variables in gtest too, they should be fixed upstream. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158090 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -36,7 +36,6 @@ namespace llvm {
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/// scheduled as soon as possible after the variable's last use.
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///
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class LoopDependencies {
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const MachineLoopInfo &MLI;
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const MachineDominatorTree &MDT;
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public:
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@ -44,9 +43,7 @@ namespace llvm {
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LoopDeps;
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LoopDeps Deps;
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LoopDependencies(const MachineLoopInfo &mli,
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const MachineDominatorTree &mdt) :
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MLI(mli), MDT(mdt) {}
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LoopDependencies(const MachineDominatorTree &mdt) : MDT(mdt) {}
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/// VisitLoop - Clear out any previous state and analyze the given loop.
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///
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@ -78,7 +78,6 @@ AntiDepBreaker::~AntiDepBreaker() { }
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namespace {
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class PostRAScheduler : public MachineFunctionPass {
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AliasAnalysis *AA;
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const TargetInstrInfo *TII;
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RegisterClassInfo RegClassInfo;
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@ -65,7 +65,6 @@ class RABasic : public MachineFunctionPass, public RegAllocBase
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MachineFunction *MF;
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// analyses
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LiveStacks *LS;
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RenderMachineFunction *RMF;
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// state
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@ -375,7 +375,7 @@ std::auto_ptr<PBQPRAProblem> PBQPBuilderWithCoalescing::build(
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PBQP::Graph &g = p->getGraph();
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const TargetMachine &tm = mf->getTarget();
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CoalescerPair cp(*tm.getInstrInfo(), *tm.getRegisterInfo());
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CoalescerPair cp(*tm.getRegisterInfo());
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// Scan the machine function and add a coalescing cost whenever CoalescerPair
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// gives the Ok.
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@ -939,7 +939,7 @@ bool RegisterCoalescer::joinCopy(MachineInstr *CopyMI, bool &Again) {
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Again = false;
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DEBUG(dbgs() << LIS->getInstructionIndex(CopyMI) << '\t' << *CopyMI);
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CoalescerPair CP(*TII, *TRI);
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CoalescerPair CP(*TRI);
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if (!CP.setRegisters(CopyMI)) {
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DEBUG(dbgs() << "\tNot coalescable.\n");
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return false;
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@ -26,7 +26,6 @@ namespace llvm {
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/// two registers can be coalesced, CoalescerPair can determine if a copy
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/// instruction would become an identity copy after coalescing.
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class CoalescerPair {
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const TargetInstrInfo &TII;
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const TargetRegisterInfo &TRI;
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/// DstReg - The register that will be left after coalescing. It can be a
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@ -60,8 +59,8 @@ namespace llvm {
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const TargetRegisterClass *NewRC;
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public:
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CoalescerPair(const TargetInstrInfo &tii, const TargetRegisterInfo &tri)
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: TII(tii), TRI(tri), DstReg(0), SrcReg(0), DstIdx(0), SrcIdx(0),
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CoalescerPair(const TargetRegisterInfo &tri)
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: TRI(tri), DstReg(0), SrcReg(0), DstIdx(0), SrcIdx(0),
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Partial(false), CrossClass(false), Flipped(false), NewRC(0) {}
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/// setRegisters - set registers to match the copy instruction MI. Return
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@ -47,7 +47,7 @@ ScheduleDAGInstrs::ScheduleDAGInstrs(MachineFunction &mf,
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: ScheduleDAG(mf), MLI(mli), MDT(mdt), MFI(mf.getFrameInfo()),
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InstrItins(mf.getTarget().getInstrItineraryData()), LIS(lis),
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IsPostRA(IsPostRAFlag), UnitLatencies(false), CanHandleTerminators(false),
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LoopRegs(MLI, MDT), FirstDbgValue(0) {
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LoopRegs(MDT), FirstDbgValue(0) {
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assert((IsPostRA || LIS) && "PreRA scheduling requires LiveIntervals");
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DbgValues.clear();
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assert(!(IsPostRA && MRI.getNumVirtRegs()) &&
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@ -24,8 +24,6 @@ STATISTIC(NumMovedInsts, "Number of predicated instructions moved");
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namespace {
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class Thumb2ITBlockPass : public MachineFunctionPass {
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bool PreRegAlloc;
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public:
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static char ID;
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Thumb2ITBlockPass() : MachineFunctionPass(ID) {}
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@ -187,7 +187,7 @@ void MBlazeAsmPrinter::EmitFunctionBodyEnd() {
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//===----------------------------------------------------------------------===//
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void MBlazeAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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MBlazeMCInstLower MCInstLowering(OutContext, *Mang, *this);
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MBlazeMCInstLower MCInstLowering(OutContext, *this);
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MCInst TmpInst;
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MCInstLowering.Lower(MI, TmpInst);
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@ -21,18 +21,16 @@ namespace llvm {
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class MachineInstr;
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class MachineModuleInfoMachO;
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class MachineOperand;
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class Mangler;
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/// MBlazeMCInstLower - This class is used to lower an MachineInstr
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/// into an MCInst.
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class LLVM_LIBRARY_VISIBILITY MBlazeMCInstLower {
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MCContext &Ctx;
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Mangler &Mang;
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AsmPrinter &Printer;
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public:
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MBlazeMCInstLower(MCContext &ctx, Mangler &mang, AsmPrinter &printer)
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: Ctx(ctx), Mang(mang), Printer(printer) {}
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MBlazeMCInstLower(MCContext &ctx, AsmPrinter &printer)
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: Ctx(ctx), Printer(printer) {}
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void Lower(const MachineInstr *MI, MCInst &OutMI) const;
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MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;
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@ -154,7 +154,7 @@ bool MSP430AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
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//===----------------------------------------------------------------------===//
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void MSP430AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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MSP430MCInstLower MCInstLowering(OutContext, *Mang, *this);
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MSP430MCInstLower MCInstLowering(OutContext, *this);
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MCInst TmpInst;
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MCInstLowering.Lower(MI, TmpInst);
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@ -59,7 +59,7 @@ HWMultMode("msp430-hwmult-mode",
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MSP430TargetLowering::MSP430TargetLowering(MSP430TargetMachine &tm) :
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TargetLowering(tm, new TargetLoweringObjectFileELF()),
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Subtarget(*tm.getSubtargetImpl()), TM(tm) {
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Subtarget(*tm.getSubtargetImpl()) {
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TD = getTargetData();
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@ -169,7 +169,6 @@ namespace llvm {
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SelectionDAG &DAG) const;
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const MSP430Subtarget &Subtarget;
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const MSP430TargetMachine &TM;
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const TargetData *TD;
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};
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} // namespace llvm
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@ -29,7 +29,7 @@ using namespace llvm;
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MSP430InstrInfo::MSP430InstrInfo(MSP430TargetMachine &tm)
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: MSP430GenInstrInfo(MSP430::ADJCALLSTACKDOWN, MSP430::ADJCALLSTACKUP),
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RI(tm, *this), TM(tm) {}
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RI(tm, *this) {}
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void MSP430InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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@ -42,7 +42,6 @@ namespace MSP430II {
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class MSP430InstrInfo : public MSP430GenInstrInfo {
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const MSP430RegisterInfo RI;
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MSP430TargetMachine &TM;
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public:
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explicit MSP430InstrInfo(MSP430TargetMachine &TM);
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@ -21,18 +21,16 @@ namespace llvm {
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class MachineInstr;
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class MachineModuleInfoMachO;
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class MachineOperand;
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class Mangler;
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/// MSP430MCInstLower - This class is used to lower an MachineInstr
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/// into an MCInst.
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class LLVM_LIBRARY_VISIBILITY MSP430MCInstLower {
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MCContext &Ctx;
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Mangler &Mang;
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AsmPrinter &Printer;
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public:
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MSP430MCInstLower(MCContext &ctx, Mangler &mang, AsmPrinter &printer)
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: Ctx(ctx), Mang(mang), Printer(printer) {}
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MSP430MCInstLower(MCContext &ctx, AsmPrinter &printer)
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: Ctx(ctx), Printer(printer) {}
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void Lower(const MachineInstr *MI, MCInst &OutMI) const;
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MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;
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@ -4057,9 +4057,6 @@ namespace {
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AU.setPreservesCFG();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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private:
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unsigned BaseReg;
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};
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}
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#define DEBUG_TYPE "indvars"
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#include "llvm/Instructions.h"
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#include "llvm/Analysis/Dominators.h"
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#include "llvm/Analysis/IVUsers.h"
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#include "llvm/Analysis/LoopInfo.h"
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#include "llvm/Analysis/LoopPass.h"
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@ -44,7 +43,6 @@ namespace {
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class SimplifyIndvar {
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Loop *L;
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LoopInfo *LI;
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DominatorTree *DT;
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ScalarEvolution *SE;
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const TargetData *TD; // May be NULL
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@ -67,8 +67,6 @@ namespace llvm {
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};
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raw_ostream &out;
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Module *LModule;
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Module *RModule;
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SmallVector<DiffContext, 5> contexts;
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bool Differences;
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unsigned Indent;
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@ -78,8 +76,8 @@ namespace llvm {
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void indent();
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public:
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DiffConsumer(Module *L, Module *R)
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: out(errs()), LModule(L), RModule(R), Differences(false), Indent(0) {}
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DiffConsumer()
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: out(errs()), Differences(false), Indent(0) {}
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bool hadDifferences() const;
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void enterContext(Value *L, Value *R);
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@ -59,8 +59,8 @@ namespace llvm {
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virtual ~Oracle() {}
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};
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DifferenceEngine(LLVMContext &context, Consumer &consumer)
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: context(context), consumer(consumer), globalValueOracle(0) {}
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DifferenceEngine(Consumer &consumer)
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: consumer(consumer), globalValueOracle(0) {}
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void diff(Module *L, Module *R);
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void diff(Function *L, Function *R);
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@ -84,7 +84,6 @@ namespace llvm {
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bool equivalentAsOperands(GlobalValue *L, GlobalValue *R);
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private:
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LLVMContext &context;
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Consumer &consumer;
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Oracle *globalValueOracle;
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};
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Module *RModule = ReadModule(Context, RightFilename);
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if (!LModule || !RModule) return 1;
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DiffConsumer Consumer(LModule, RModule);
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DifferenceEngine Engine(Context, Consumer);
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DiffConsumer Consumer;
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DifferenceEngine Engine(Consumer);
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// If any global names were given, just diff those.
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if (!GlobalsToCompare.empty()) {
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llvm::TargetMachine* _target;
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bool _emitDwarfDebugInfo;
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bool _scopeRestrictionsDone;
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bool _runInternalizePass;
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lto_codegen_model _codeModel;
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StringSet _mustPreserveSymbols;
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StringSet _asmUndefinedRefs;
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@ -867,6 +867,6 @@ void FastISelEmitter::run(raw_ostream &OS) {
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}
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FastISelEmitter::FastISelEmitter(RecordKeeper &R)
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: Records(R), CGP(R) {
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: CGP(R) {
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}
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/// and emission of the instruction selector.
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///
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class FastISelEmitter : public TableGenBackend {
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RecordKeeper &Records;
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CodeGenDAGPatterns CGP;
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public:
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explicit FastISelEmitter(RecordKeeper &R);
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