From a7660be6c21f23922baf61c880ec8f2224c23200 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Tue, 17 Feb 2004 06:30:34 +0000
Subject: [PATCH] Add an option to disable spill fusing in the X86 backend

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11531 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/X86/X86RegisterInfo.cpp | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index b3d9bb2ab83..dae171f8af8 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -31,6 +31,9 @@ namespace {
   cl::opt<bool>
   NoFPElim("disable-fp-elim",
 	   cl::desc("Disable frame pointer elimination optimization"));
+  cl::opt<bool>
+  NoFusing("disable-spill-fusing",
+           cl::desc("Disable fusing of spill code into instructions"));
 }
 
 X86RegisterInfo::X86RegisterInfo()
@@ -106,6 +109,8 @@ static MachineInstr *MakeRMIInst(unsigned Opcode, unsigned FrameIndex,
 
 bool X86RegisterInfo::foldMemoryOperand(MachineBasicBlock::iterator &MI,
                                         unsigned i, int FrameIndex) const {
+  if (NoFusing) return false;
+
   /// FIXME: This should obviously be autogenerated by tablegen when patterns
   /// are available!
   MachineBasicBlock& MBB = *MI->getParent();