mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-01 15:11:24 +00:00
ARM: fix thumb coprocessor instruction with pre-writeback disassembly
was stc2 p0, c0, [r0]! instead of stc2 p0, c0, [r0,#0]! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183975 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
d25ec760cb
commit
a768a49548
@ -3632,7 +3632,7 @@ multiclass t2LdStCop<bits<4> op31_28, bit load, bit Dbit, string asm> {
|
||||
let DecoderMethod = "DecodeCopMemInstruction";
|
||||
}
|
||||
def _PRE : T2CI<op31_28,
|
||||
(outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr),
|
||||
(outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5_pre:$addr),
|
||||
asm, "\t$cop, $CRd, $addr!"> {
|
||||
bits<13> addr;
|
||||
bits<4> cop;
|
||||
|
@ -221,6 +221,9 @@
|
||||
# CHECK: stc2 p12, c15, [r9], {137}
|
||||
0x89 0xfc 0x89 0xfc
|
||||
|
||||
# CHECK: stc2 p0, c0, [r0, #0]!
|
||||
0xa0 0xfd 0x00 0x00
|
||||
|
||||
# CHECK: vmov r1, r0, d11
|
||||
0x50 0xec 0x1b 0x1b
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user