6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-07 14:33:15 +00:00
Code Issues Projects Releases Wiki Activity

Fix some "</p>"s.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59963 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2008-11-24 16:35:31 +00:00
parent 641b279710
commit a7ab2bffae
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
docs/CodeGenerator.html
View File

@ -1077,7 +1077,7 @@ def FADDS : AForm_2&lt;59, 21,
<p>The portion of the instruction definition in bold indicates the pattern used <p>The portion of the instruction definition in bold indicates the pattern used
to match the instruction. The DAG operators (like <tt>fmul</tt>/<tt>fadd</tt>) to match the instruction. The DAG operators (like <tt>fmul</tt>/<tt>fadd</tt>)
are defined in the <tt>lib/Target/TargetSelectionDAG.td</tt> file. are defined in the <tt>lib/Target/TargetSelectionDAG.td</tt> file.
"<tt>F4RC</tt>" is the register class of the input and result values.<p> "<tt>F4RC</tt>" is the register class of the input and result values.</p>
<p>The TableGen DAG instruction selector generator reads the instruction <p>The TableGen DAG instruction selector generator reads the instruction
patterns in the <tt>.td</tt> file and automatically builds parts of the pattern patterns in the <tt>.td</tt> file and automatically builds parts of the pattern
@ -1556,7 +1556,7 @@ instance, a sequence of instructions such as:</p>
</pre> </pre>
</div> </div>
<p>can be safely substituted by the single instruction: <p>can be safely substituted by the single instruction:</p>
<div class="doc_code"> <div class="doc_code">
<pre> <pre>