Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple

pair instead of from a virtual method on TargetMachine.  This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use 
TargetAsmInfo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78802 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2009-08-12 07:22:17 +00:00
parent 54d26fa799
commit a7ac47cee1
50 changed files with 210 additions and 168 deletions

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@ -102,12 +102,8 @@ protected: // Can only create subclasses.
/// AsmInfo - Contains target specific asm information.
///
mutable const TargetAsmInfo *AsmInfo;
const TargetAsmInfo *AsmInfo;
/// createTargetAsmInfo - Create a new instance of target specific asm
/// information.
virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; }
public:
virtual ~TargetMachine();
@ -126,10 +122,7 @@ public:
/// getTargetAsmInfo - Return target specific asm information.
///
const TargetAsmInfo *getTargetAsmInfo() const {
if (!AsmInfo) AsmInfo = createTargetAsmInfo();
return AsmInfo;
}
const TargetAsmInfo *getTargetAsmInfo() const { return AsmInfo; }
/// getSubtarget - This method returns a pointer to the specified type of
/// TargetSubtarget. In debug builds, it verifies that the object being
@ -291,9 +284,8 @@ public:
///
class LLVMTargetMachine : public TargetMachine {
protected: // Can only create subclasses.
LLVMTargetMachine(const Target &T, const std::string &TargetTriple)
: TargetMachine(T) { }
LLVMTargetMachine(const Target &T, const std::string &TargetTriple);
/// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
/// both emitting to assembly files or machine code output.
///

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@ -43,20 +43,22 @@ namespace llvm {
/// will be zero initialized), and pass that instance to the TargetRegistry as
/// part of their initialization.
class Target {
private:
public:
friend struct TargetRegistry;
typedef unsigned (*TripleMatchQualityFnTy)(const std::string &TT);
typedef TargetMachine *(*TargetMachineCtorTy)(const Target &,
const std::string &,
const std::string &);
typedef const TargetAsmInfo *(*AsmInfoCtorFnTy)(const Target &T,
const StringRef &TT);
typedef TargetMachine *(*TargetMachineCtorTy)(const Target &T,
const std::string &TT,
const std::string &Features);
typedef FunctionPass *(*AsmPrinterCtorTy)(formatted_raw_ostream &,
TargetMachine &,
bool);
typedef TargetAsmParser *(*AsmParserCtorTy)(const Target &,
MCAsmParser &);
friend struct TargetRegistry;
private:
/// Next - The next registered target in the linked list, maintained by the
/// TargetRegistry.
Target *Next;
@ -74,6 +76,8 @@ namespace llvm {
/// HasJIT - Whether this target supports the JIT.
bool HasJIT;
AsmInfoCtorFnTy AsmInfoCtorFn;
/// TargetMachineCtorFn - Construction function for this target's
/// TargetMachine, if registered.
TargetMachineCtorTy TargetMachineCtorFn;
@ -107,11 +111,23 @@ namespace llvm {
/// hasAsmParser - Check if this target supports .s parsing.
bool hasAsmParser() const { return AsmParserCtorFn != 0; }
/// createTargetMachine - Create a target specific machine implementation
/// for the module \arg M and \arg Triple.
/// createAsmInfo - Create a TargetAsmInfo implementation for the specified
/// target triple.
///
/// \arg Triple - This argument is used to determine the target machine
/// feature set; it should always be provided. Generally this should be
/// either the target triple from the module, or the target triple of the
/// host if that does not exist.
const TargetAsmInfo *createAsmInfo(const StringRef &Triple) const {
if (!AsmInfoCtorFn)
return 0;
return AsmInfoCtorFn(*this, Triple);
}
/// createTargetMachine - Create a target specific machine implementation
/// for the specified \arg Triple.
///
/// \arg M - This argument is used for some machines to access the target
/// data.
/// \arg Triple - This argument is used to determine the target machine
/// feature set; it should always be provided. Generally this should be
/// either the target triple from the module, or the target triple of the
@ -228,7 +244,22 @@ namespace llvm {
const char *ShortDesc,
Target::TripleMatchQualityFnTy TQualityFn,
bool HasJIT = false);
/// RegisterAsmInfo - Register a TargetAsmInfo implementation for the
/// given target.
///
/// Clients are responsible for ensuring that registration doesn't occur
/// while another thread is attempting to access the registry. Typically
/// this is done by initializing all targets at program startup.
///
/// @param T - The target being registered.
/// @param Fn - A function to construct a TargetAsmInfo for the target.
static void RegisterAsmInfo(Target &T, Target::AsmInfoCtorFnTy Fn) {
// Ignore duplicate registration.
if (!T.AsmInfoCtorFn)
T.AsmInfoCtorFn = Fn;
}
/// RegisterTargetMachine - Register a TargetMachine implementation for the
/// given target.
///
@ -305,6 +336,41 @@ namespace llvm {
}
};
/// RegisterAsmInfo - Helper template for registering a target assembly info
/// implementation. This invokes the static "Create" method on the class to
/// actually do the construction. Usage:
///
/// extern "C" void LLVMInitializeFooTarget() {
/// extern Target TheFooTarget;
/// RegisterAsmInfo<FooTargetAsmInfo> X(TheFooTarget);
/// }
template<class TargetAsmInfoImpl>
struct RegisterAsmInfo {
RegisterAsmInfo(Target &T) {
TargetRegistry::RegisterAsmInfo(T, &Allocator);
}
private:
static const TargetAsmInfo *Allocator(const Target &T, const StringRef &TT){
return new TargetAsmInfoImpl(T, TT);
}
};
/// RegisterAsmInfoFn - Helper template for registering a target assembly info
/// implementation. This invokes the specified function to do the
/// construction. Usage:
///
/// extern "C" void LLVMInitializeFooTarget() {
/// extern Target TheFooTarget;
/// RegisterAsmInfoFn X(TheFooTarget, TheFunction);
/// }
struct RegisterAsmInfoFn {
RegisterAsmInfoFn(Target &T, Target::AsmInfoCtorFnTy Fn) {
TargetRegistry::RegisterAsmInfo(T, Fn);
}
};
/// RegisterTargetMachine - Helper template for registering a target machine
/// implementation, for use in the target machine initialization
/// function. Usage:

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@ -55,6 +55,15 @@ static cl::opt<cl::boolOrDefault>
EnableFastISelOption("fast-isel", cl::Hidden,
cl::desc("Enable the experimental \"fast\" instruction selector"));
LLVMTargetMachine::LLVMTargetMachine(const Target &T,
const std::string &TargetTriple)
: TargetMachine(T) {
AsmInfo = T.createAsmInfo(TargetTriple);
}
FileModel::Model
LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
formatted_raw_ostream &Out,

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@ -27,10 +27,26 @@ static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
cl::desc("Disable if-conversion pass"));
static const TargetAsmInfo *createTargetAsmInfo(const Target &T,
const StringRef &TT) {
Triple TheTriple(TT);
switch (TheTriple.getOS()) {
case Triple::Darwin:
return new ARMDarwinTargetAsmInfo();
default:
return new ARMELFTargetAsmInfo();
}
}
extern "C" void LLVMInitializeARMTarget() {
// Register the target.
RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
// Register the target asm info.
RegisterAsmInfoFn A(TheARMTarget, createTargetAsmInfo);
RegisterAsmInfoFn B(TheThumbTarget, createTargetAsmInfo);
}
/// TargetMachine ctor - Create an ARM architecture model.
@ -73,16 +89,6 @@ ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
}
const TargetAsmInfo *ARMBaseTargetMachine::createTargetAsmInfo() const {
switch (Subtarget.TargetType) {
default: llvm_unreachable("Unknown ARM subtarget kind");
case ARMSubtarget::isDarwin:
return new ARMDarwinTargetAsmInfo();
case ARMSubtarget::isELF:
return new ARMELFTargetAsmInfo();
}
}
// Pass Pipeline Configuration
bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,

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@ -47,8 +47,6 @@ public:
return InstrItins;
}
virtual const TargetAsmInfo *createTargetAsmInfo() const;
// Pass Pipeline Configuration
virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
virtual bool addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);

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@ -14,7 +14,7 @@
#include "AlphaTargetAsmInfo.h"
using namespace llvm;
AlphaTargetAsmInfo::AlphaTargetAsmInfo() {
AlphaTargetAsmInfo::AlphaTargetAsmInfo(const Target &T, const StringRef &TT) {
AlignmentIsInBytes = false;
PrivateGlobalPrefix = "$";
PICJumpTableDirective = ".gprel32";

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@ -17,9 +17,11 @@
#include "llvm/Target/TargetAsmInfo.h"
namespace llvm {
class Target;
class StringRef;
struct AlphaTargetAsmInfo : public TargetAsmInfo {
explicit AlphaTargetAsmInfo();
explicit AlphaTargetAsmInfo(const Target &T, const StringRef &TT);
};
} // namespace llvm

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@ -17,16 +17,12 @@
#include "llvm/PassManager.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/Target/TargetRegistry.h"
using namespace llvm;
extern "C" void LLVMInitializeAlphaTarget() {
// Register the target.
RegisterTargetMachine<AlphaTargetMachine> X(TheAlphaTarget);
}
const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
return new AlphaTargetAsmInfo();
RegisterAsmInfo<AlphaTargetAsmInfo> Y(TheAlphaTarget);
}
AlphaTargetMachine::AlphaTargetMachine(const Target &T, const std::string &TT,

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@ -34,9 +34,6 @@ class AlphaTargetMachine : public LLVMTargetMachine {
AlphaSubtarget Subtarget;
AlphaTargetLowering TLInfo;
protected:
virtual const TargetAsmInfo *createTargetAsmInfo() const;
public:
AlphaTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);

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@ -15,7 +15,8 @@
using namespace llvm;
BlackfinTargetAsmInfo::BlackfinTargetAsmInfo() {
BlackfinTargetAsmInfo::BlackfinTargetAsmInfo(const Target &T,
const StringRef &TT) {
GlobalPrefix = "_";
CommentString = "//";
}

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@ -17,9 +17,11 @@
#include "llvm/Target/TargetAsmInfo.h"
namespace llvm {
class Target;
class StringRef;
struct BlackfinTargetAsmInfo : public TargetAsmInfo {
explicit BlackfinTargetAsmInfo();
explicit BlackfinTargetAsmInfo(const Target &T, const StringRef &TT);
};
} // namespace llvm

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@ -20,10 +20,8 @@ using namespace llvm;
extern "C" void LLVMInitializeBlackfinTarget() {
RegisterTargetMachine<BlackfinTargetMachine> X(TheBlackfinTarget);
}
RegisterAsmInfo<BlackfinTargetAsmInfo> Y(TheBlackfinTarget);
const TargetAsmInfo* BlackfinTargetMachine::createTargetAsmInfo() const {
return new BlackfinTargetAsmInfo();
}
BlackfinTargetMachine::BlackfinTargetMachine(const Target &T,

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@ -29,10 +29,6 @@ namespace llvm {
BlackfinTargetLowering TLInfo;
BlackfinInstrInfo InstrInfo;
TargetFrameInfo FrameInfo;
protected:
virtual const TargetAsmInfo *createTargetAsmInfo() const;
public:
BlackfinTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);

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@ -14,7 +14,7 @@
#include "SPUTargetAsmInfo.h"
using namespace llvm;
SPULinuxTargetAsmInfo::SPULinuxTargetAsmInfo() {
SPULinuxTargetAsmInfo::SPULinuxTargetAsmInfo(const Target &T, const StringRef &TT) {
ZeroDirective = "\t.space\t";
SetDirective = "\t.set";
Data64bitsDirective = "\t.quad\t";

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@ -17,9 +17,11 @@
#include "llvm/Target/TargetAsmInfo.h"
namespace llvm {
class Target;
class StringRef;
struct SPULinuxTargetAsmInfo : public TargetAsmInfo {
explicit SPULinuxTargetAsmInfo();
explicit SPULinuxTargetAsmInfo(const Target &T, const StringRef &TT);
};
} // namespace llvm

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@ -25,6 +25,7 @@ using namespace llvm;
extern "C" void LLVMInitializeCellSPUTarget() {
// Register the target.
RegisterTargetMachine<SPUTargetMachine> X(TheCellSPUTarget);
RegisterAsmInfo<SPULinuxTargetAsmInfo> Y(TheCellSPUTarget);
}
const std::pair<unsigned, int> *
@ -33,10 +34,6 @@ SPUFrameInfo::getCalleeSaveSpillSlots(unsigned &NumEntries) const {
return &LR[0];
}
const TargetAsmInfo *SPUTargetMachine::createTargetAsmInfo() const {
return new SPULinuxTargetAsmInfo();
}
SPUTargetMachine::SPUTargetMachine(const Target &T, const std::string &TT,
const std::string &FS)
: LLVMTargetMachine(T, TT),

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@ -35,10 +35,6 @@ class SPUTargetMachine : public LLVMTargetMachine {
SPUFrameInfo FrameInfo;
SPUTargetLowering TLInfo;
InstrItineraryData InstrItins;
protected:
virtual const TargetAsmInfo *createTargetAsmInfo() const;
public:
SPUTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);

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@ -15,6 +15,7 @@
#define DEBUG_TYPE "asm-printer"
#include "MSP430.h"
#include "MSP430InstrInfo.h"
#include "MSP430TargetAsmInfo.h"
#include "MSP430TargetMachine.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
@ -25,7 +26,6 @@
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetLoweringObjectFile.h"
#include "llvm/Target/TargetRegistry.h"
@ -246,4 +246,5 @@ extern "C" void LLVMInitializeMSP430Target() {
// Register the target.
RegisterTargetMachine<MSP430TargetMachine> X(TheMSP430Target);
RegisterAsmPrinter<MSP430AsmPrinter> Y(TheMSP430Target);
RegisterAsmInfo<MSP430TargetAsmInfo> Z(TheMSP430Target);
}

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@ -14,6 +14,6 @@
#include "MSP430TargetAsmInfo.h"
using namespace llvm;
MSP430TargetAsmInfo::MSP430TargetAsmInfo() {
MSP430TargetAsmInfo::MSP430TargetAsmInfo(const Target &T, const StringRef &TT) {
AlignmentIsInBytes = false;
}

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@ -17,8 +17,10 @@
#include "llvm/Target/TargetAsmInfo.h"
namespace llvm {
class Target;
class StringRef;
struct MSP430TargetAsmInfo : public TargetAsmInfo {
explicit MSP430TargetAsmInfo();
explicit MSP430TargetAsmInfo(const Target &T, const StringRef &TT);
};
} // namespace llvm

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@ -29,9 +29,6 @@ MSP430TargetMachine::MSP430TargetMachine(const Target &T,
InstrInfo(*this), TLInfo(*this),
FrameInfo(TargetFrameInfo::StackGrowsDown, 2, -2) { }
const TargetAsmInfo *MSP430TargetMachine::createTargetAsmInfo() const {
return new MSP430TargetAsmInfo();
}
bool MSP430TargetMachine::addInstSelector(PassManagerBase &PM,
CodeGenOpt::Level OptLevel) {

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@ -37,9 +37,6 @@ class MSP430TargetMachine : public LLVMTargetMachine {
// any MSP430 specific FrameInfo class.
TargetFrameInfo FrameInfo;
protected:
virtual const TargetAsmInfo *createTargetAsmInfo() const;
public:
MSP430TargetMachine(const Target &T, const std::string &TT,
const std::string &FS);

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@ -14,7 +14,7 @@
#include "MipsTargetAsmInfo.h"
using namespace llvm;
MipsTargetAsmInfo::MipsTargetAsmInfo() {
MipsTargetAsmInfo::MipsTargetAsmInfo(const Target &T, const StringRef &TT) {
AlignmentIsInBytes = false;
COMMDirectiveTakesAlignment = true;
Data16bitsDirective = "\t.half\t";

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@ -17,9 +17,12 @@
#include "llvm/Target/TargetAsmInfo.h"
namespace llvm {
class Target;
class StringRef;
class MipsTargetAsmInfo : public TargetAsmInfo {
public:
explicit MipsTargetAsmInfo();
explicit MipsTargetAsmInfo(const Target &T, const StringRef &TT);
};
} // namespace llvm

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@ -22,10 +22,8 @@ extern "C" void LLVMInitializeMipsTarget() {
// Register the target.
RegisterTargetMachine<MipsTargetMachine> X(TheMipsTarget);
RegisterTargetMachine<MipselTargetMachine> Y(TheMipselTarget);
}
const TargetAsmInfo *MipsTargetMachine::createTargetAsmInfo() const {
return new MipsTargetAsmInfo();
RegisterAsmInfo<MipsTargetAsmInfo> A(TheMipsTarget);
RegisterAsmInfo<MipsTargetAsmInfo> B(TheMipselTarget);
}
// DataLayout --> Big-endian, 32-bit pointer/ABI/alignment

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@ -30,10 +30,6 @@ namespace llvm {
MipsInstrInfo InstrInfo;
TargetFrameInfo FrameInfo;
MipsTargetLowering TLInfo;
protected:
virtual const TargetAsmInfo *createTargetAsmInfo() const;
public:
MipsTargetMachine(const Target &T, const std::string &TT,
const std::string &FS, bool isLittle);

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@ -480,4 +480,7 @@ extern "C" void LLVMInitializePIC16Target() {
RegisterTargetMachine<CooperTargetMachine> B(TheCooperTarget);
RegisterAsmPrinter<PIC16AsmPrinter> C(ThePIC16Target);
RegisterAsmPrinter<PIC16AsmPrinter> D(TheCooperTarget);
RegisterAsmInfo<PIC16TargetAsmInfo> E(ThePIC16Target);
RegisterAsmInfo<PIC16TargetAsmInfo> F(TheCooperTarget);
}

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@ -19,8 +19,7 @@
#include "PIC16ISelLowering.h"
using namespace llvm;
PIC16TargetAsmInfo::
PIC16TargetAsmInfo() {
PIC16TargetAsmInfo::PIC16TargetAsmInfo(const Target &T, const StringRef &TT) {
CommentString = ";";
GlobalPrefix = PAN::getTagName(PAN::PREFIX_SYMBOL);
GlobalDirective = "\tglobal\t";

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@ -17,12 +17,15 @@
#include "llvm/Target/TargetAsmInfo.h"
namespace llvm {
class Target;
class StringRef;
class PIC16TargetAsmInfo : public TargetAsmInfo {
const char *RomData8bitsDirective;
const char *RomData16bitsDirective;
const char *RomData32bitsDirective;
public:
PIC16TargetAsmInfo();
PIC16TargetAsmInfo(const Target &T, const StringRef &TT);
virtual const char *getDataASDirective(unsigned size, unsigned AS) const;
};

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@ -36,10 +36,6 @@ CooperTargetMachine::CooperTargetMachine(const Target &T, const std::string &TT,
: PIC16TargetMachine(T, TT, FS, true) {}
const TargetAsmInfo *PIC16TargetMachine::createTargetAsmInfo() const {
return new PIC16TargetAsmInfo();
}
bool PIC16TargetMachine::addInstSelector(PassManagerBase &PM,
CodeGenOpt::Level OptLevel) {
// Install an instruction selector.

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@ -37,9 +37,6 @@ class PIC16TargetMachine : public LLVMTargetMachine {
// any PIC16 specific FrameInfo class.
TargetFrameInfo FrameInfo;
protected:
virtual const TargetAsmInfo *createTargetAsmInfo() const;
public:
PIC16TargetMachine(const Target &T, const std::string &TT,
const std::string &FS, bool Cooper = false);

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@ -20,17 +20,25 @@
#include "llvm/Support/FormattedStream.h"
using namespace llvm;
static const TargetAsmInfo *createTargetAsmInfo(const Target &T,
const StringRef &TT) {
Triple TheTriple(TT);
bool isPPC64 = TheTriple.getArch() == Triple::ppc64;
if (TheTriple.getOS() == Triple::Darwin)
return new PPCDarwinTargetAsmInfo(isPPC64);
return new PPCLinuxTargetAsmInfo(isPPC64);
}
extern "C" void LLVMInitializePowerPCTarget() {
// Register the targets
RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
RegisterAsmInfoFn C(ThePPC32Target, createTargetAsmInfo);
RegisterAsmInfoFn D(ThePPC64Target, createTargetAsmInfo);
}
const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
if (Subtarget.isDarwin())
return new PPCDarwinTargetAsmInfo(Subtarget.isPPC64());
return new PPCLinuxTargetAsmInfo(Subtarget.isPPC64());
}
PPCTargetMachine::PPCTargetMachine(const Target &T, const std::string &TT,
const std::string &FS, bool is64Bit)

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@ -39,9 +39,6 @@ class PPCTargetMachine : public LLVMTargetMachine {
InstrItineraryData InstrItins;
PPCMachOWriterInfo MachOWriterInfo;
protected:
virtual const TargetAsmInfo *createTargetAsmInfo() const;
public:
PPCTargetMachine(const Target &T, const std::string &TT,
const std::string &FS, bool is64Bit);

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@ -15,7 +15,8 @@
#include "llvm/ADT/SmallVector.h"
using namespace llvm;
SparcELFTargetAsmInfo::SparcELFTargetAsmInfo() {
SparcELFTargetAsmInfo::SparcELFTargetAsmInfo(const Target &T,
const StringRef &TT) {
Data16bitsDirective = "\t.half\t";
Data32bitsDirective = "\t.word\t";
Data64bitsDirective = 0; // .xword is only supported by V9.

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@ -17,9 +17,10 @@
#include "llvm/Target/TargetAsmInfo.h"
namespace llvm {
class Target;
class StringRef;
struct SparcELFTargetAsmInfo : public TargetAsmInfo {
explicit SparcELFTargetAsmInfo();
explicit SparcELFTargetAsmInfo(const Target &T, const StringRef &TT);
};
} // namespace llvm

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@ -20,11 +20,8 @@ using namespace llvm;
extern "C" void LLVMInitializeSparcTarget() {
// Register the target.
RegisterTargetMachine<SparcTargetMachine> X(TheSparcTarget);
}
RegisterAsmInfo<SparcELFTargetAsmInfo> Y(TheSparcTarget);
const TargetAsmInfo *SparcTargetMachine::createTargetAsmInfo() const {
// FIXME: Handle Solaris subtarget someday :)
return new SparcELFTargetAsmInfo();
}
/// SparcTargetMachine ctor - Create an ILP32 architecture model

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@ -29,10 +29,6 @@ class SparcTargetMachine : public LLVMTargetMachine {
SparcTargetLowering TLInfo;
SparcInstrInfo InstrInfo;
TargetFrameInfo FrameInfo;
protected:
virtual const TargetAsmInfo *createTargetAsmInfo() const;
public:
SparcTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);

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@ -14,7 +14,8 @@
#include "SystemZTargetAsmInfo.h"
using namespace llvm;
SystemZTargetAsmInfo::SystemZTargetAsmInfo() {
SystemZTargetAsmInfo::SystemZTargetAsmInfo(const Target &T,
const StringRef &TT) {
AlignmentIsInBytes = true;
PrivateGlobalPrefix = ".L";

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@ -17,9 +17,11 @@
#include "llvm/Target/TargetAsmInfo.h"
namespace llvm {
class Target;
class StringRef;
struct SystemZTargetAsmInfo : public TargetAsmInfo {
explicit SystemZTargetAsmInfo();
explicit SystemZTargetAsmInfo(const Target &T, const StringRef &TT);
};
} // namespace llvm

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@ -6,9 +6,6 @@
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
//
//===----------------------------------------------------------------------===//
#include "SystemZTargetAsmInfo.h"
#include "SystemZTargetMachine.h"
@ -20,10 +17,7 @@ using namespace llvm;
extern "C" void LLVMInitializeSystemZTarget() {
// Register the target.
RegisterTargetMachine<SystemZTargetMachine> X(TheSystemZTarget);
}
const TargetAsmInfo *SystemZTargetMachine::createTargetAsmInfo() const {
return new SystemZTargetAsmInfo();
RegisterAsmInfo<SystemZTargetAsmInfo> Y(TheSystemZTarget);
}
/// SystemZTargetMachine ctor - Create an ILP64 architecture model

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@ -36,10 +36,6 @@ class SystemZTargetMachine : public LLVMTargetMachine {
// SystemZ does not have any call stack frame, therefore not having
// any SystemZ specific FrameInfo class.
TargetFrameInfo FrameInfo;
protected:
virtual const TargetAsmInfo *createTargetAsmInfo() const;
public:
SystemZTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);

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@ -13,6 +13,7 @@
#include "X86TargetAsmInfo.h"
#include "X86TargetMachine.h"
#include "llvm/ADT/Triple.h"
#include "llvm/Support/CommandLine.h"
using namespace llvm;
@ -42,12 +43,11 @@ static const char *const x86_asm_table[] = {
"{cc}", "cc",
0,0};
X86DarwinTargetAsmInfo::X86DarwinTargetAsmInfo(const X86TargetMachine &TM) {
X86DarwinTargetAsmInfo::X86DarwinTargetAsmInfo(const Triple &Triple) {
AsmTransCBE = x86_asm_table;
AssemblerDialect = AsmWriterFlavor;
const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>();
bool is64Bit = Subtarget->is64Bit();
bool is64Bit = Triple.getArch() == Triple::x86_64;
TextAlignFillValue = 0x90;
@ -55,7 +55,7 @@ X86DarwinTargetAsmInfo::X86DarwinTargetAsmInfo(const X86TargetMachine &TM) {
Data64bitsDirective = 0; // we can't emit a 64-bit unit
// Leopard and above support aligned common symbols.
COMMDirectiveTakesAlignment = (Subtarget->getDarwinVers() >= 9);
COMMDirectiveTakesAlignment = Triple.getDarwinMajorNumber() >= 9;
if (is64Bit) {
PersonalityPrefix = "";
@ -76,7 +76,7 @@ X86DarwinTargetAsmInfo::X86DarwinTargetAsmInfo(const X86TargetMachine &TM) {
AbsoluteEHSectionOffsets = false;
}
X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const X86TargetMachine &TM) {
X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const Triple &Triple) {
AsmTransCBE = x86_asm_table;
AssemblerDialect = AsmWriterFlavor;
@ -97,17 +97,17 @@ X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const X86TargetMachine &TM) {
AbsoluteEHSectionOffsets = false;
// On Linux we must declare when we can use a non-executable stack.
if (TM.getSubtarget<X86Subtarget>().isLinux())
if (Triple.getOS() == Triple::Linux)
NonexecutableStackDirective = "\t.section\t.note.GNU-stack,\"\",@progbits";
}
X86COFFTargetAsmInfo::X86COFFTargetAsmInfo(const X86TargetMachine &TM) {
X86COFFTargetAsmInfo::X86COFFTargetAsmInfo(const Triple &Triple) {
AsmTransCBE = x86_asm_table;
AssemblerDialect = AsmWriterFlavor;
}
X86WinTargetAsmInfo::X86WinTargetAsmInfo(const X86TargetMachine &TM) {
X86WinTargetAsmInfo::X86WinTargetAsmInfo(const Triple &Triple) {
AsmTransCBE = x86_asm_table;
AssemblerDialect = AsmWriterFlavor;

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@ -14,27 +14,27 @@
#ifndef X86TARGETASMINFO_H
#define X86TARGETASMINFO_H
#include "X86TargetMachine.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/COFFTargetAsmInfo.h"
#include "llvm/Target/DarwinTargetAsmInfo.h"
namespace llvm {
class Triple;
struct X86DarwinTargetAsmInfo : public DarwinTargetAsmInfo {
explicit X86DarwinTargetAsmInfo(const X86TargetMachine &TM);
explicit X86DarwinTargetAsmInfo(const Triple &Triple);
};
struct X86ELFTargetAsmInfo : public TargetAsmInfo {
explicit X86ELFTargetAsmInfo(const X86TargetMachine &TM);
explicit X86ELFTargetAsmInfo(const Triple &Triple);
};
struct X86COFFTargetAsmInfo : public COFFTargetAsmInfo {
explicit X86COFFTargetAsmInfo(const X86TargetMachine &TM);
explicit X86COFFTargetAsmInfo(const Triple &Triple);
};
struct X86WinTargetAsmInfo : public TargetAsmInfo {
explicit X86WinTargetAsmInfo(const X86TargetMachine &TM);
explicit X86WinTargetAsmInfo(const Triple &Triple);
};
} // namespace llvm

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@ -22,26 +22,33 @@
#include "llvm/Target/TargetRegistry.h"
using namespace llvm;
static const TargetAsmInfo *createTargetAsmInfo(const Target &T,
const StringRef &TT) {
Triple TheTriple(TT);
switch (TheTriple.getOS()) {
case Triple::Darwin:
return new X86DarwinTargetAsmInfo(TheTriple);
case Triple::MinGW32:
case Triple::MinGW64:
case Triple::Cygwin:
return new X86COFFTargetAsmInfo(TheTriple);
case Triple::Win32:
return new X86WinTargetAsmInfo(TheTriple);
default:
return new X86ELFTargetAsmInfo(TheTriple);
}
}
extern "C" void LLVMInitializeX86Target() {
// Register the target.
RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
// Register the target asm info.
RegisterAsmInfoFn A(TheX86_32Target, createTargetAsmInfo);
RegisterAsmInfoFn B(TheX86_64Target, createTargetAsmInfo);
}
const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {
switch (Subtarget.TargetType) {
default: llvm_unreachable("unknown subtarget type");
case X86Subtarget::isDarwin:
return new X86DarwinTargetAsmInfo(*this);
case X86Subtarget::isELF:
return new X86ELFTargetAsmInfo(*this);
case X86Subtarget::isMingw:
case X86Subtarget::isCygwin:
return new X86COFFTargetAsmInfo(*this);
case X86Subtarget::isWindows:
return new X86WinTargetAsmInfo(*this);
}
}
X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
const std::string &FS)

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@ -38,9 +38,6 @@ class X86TargetMachine : public LLVMTargetMachine {
X86ELFWriterInfo ELFWriterInfo;
Reloc::Model DefRelocModel; // Reloc model before it's overridden.
protected:
virtual const TargetAsmInfo *createTargetAsmInfo() const;
public:
X86TargetMachine(const Target &T, const std::string &TT,
const std::string &FS, bool is64Bit);

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@ -16,6 +16,7 @@
#include "XCore.h"
#include "XCoreInstrInfo.h"
#include "XCoreSubtarget.h"
#include "XCoreTargetAsmInfo.h"
#include "XCoreTargetMachine.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
@ -26,7 +27,6 @@
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetLoweringObjectFile.h"
#include "llvm/Target/TargetRegistry.h"
@ -380,4 +380,5 @@ bool XCoreAsmPrinter::doInitialization(Module &M) {
extern "C" void LLVMInitializeXCoreTarget() {
RegisterTargetMachine<XCoreTargetMachine> X(TheXCoreTarget);
RegisterAsmPrinter<XCoreAsmPrinter> Y(TheXCoreTarget);
RegisterAsmInfo<XCoreTargetAsmInfo> Z(TheXCoreTarget);
}

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@ -10,7 +10,7 @@
#include "XCoreTargetAsmInfo.h"
using namespace llvm;
XCoreTargetAsmInfo::XCoreTargetAsmInfo() {
XCoreTargetAsmInfo::XCoreTargetAsmInfo(const Target &T, const StringRef &TT) {
SupportsDebugInformation = true;
Data16bitsDirective = "\t.short\t";
Data32bitsDirective = "\t.long\t";

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@ -17,9 +17,11 @@
#include "llvm/Target/TargetAsmInfo.h"
namespace llvm {
class Target;
class StringRef;
class XCoreTargetAsmInfo : public TargetAsmInfo {
public:
explicit XCoreTargetAsmInfo();
explicit XCoreTargetAsmInfo(const Target &T, const StringRef &TT);
};
} // namespace llvm

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@ -17,10 +17,6 @@
#include "llvm/PassManager.h"
using namespace llvm;
const TargetAsmInfo *XCoreTargetMachine::createTargetAsmInfo() const {
return new XCoreTargetAsmInfo();
}
/// XCoreTargetMachine ctor - Create an ILP32 architecture model
///
XCoreTargetMachine::XCoreTargetMachine(const Target &T, const std::string &TT,

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@ -29,10 +29,6 @@ class XCoreTargetMachine : public LLVMTargetMachine {
XCoreInstrInfo InstrInfo;
XCoreFrameInfo FrameInfo;
XCoreTargetLowering TLInfo;
protected:
virtual const TargetAsmInfo *createTargetAsmInfo() const;
public:
XCoreTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);