From a7f0941b8332163a42f84bae7ac2b388c6342345 Mon Sep 17 00:00:00 2001 From: Sylvestre Ledru Date: Mon, 11 Aug 2014 18:04:46 +0000 Subject: [PATCH] Fix typos: * libaries => libraries * avaiable => available git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215366 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/CommandGuide/llvm-config.rst | 2 +- lib/IR/LegacyPassManager.cpp | 2 +- lib/Target/AArch64/AArch64FrameLowering.cpp | 2 +- lib/Target/Mips/Mips16ISelLowering.cpp | 2 +- lib/Target/Mips/MipsISelLowering.cpp | 2 +- lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp | 2 +- lib/Target/R600/AMDILCFGStructurizer.cpp | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) diff --git a/docs/CommandGuide/llvm-config.rst b/docs/CommandGuide/llvm-config.rst index 0ebb344c06a..34075d0b308 100644 --- a/docs/CommandGuide/llvm-config.rst +++ b/docs/CommandGuide/llvm-config.rst @@ -151,7 +151,7 @@ libraries. Useful "virtual" components include: **all** - Includes all LLVM libaries. The default if no components are specified. + Includes all LLVM libraries. The default if no components are specified. diff --git a/lib/IR/LegacyPassManager.cpp b/lib/IR/LegacyPassManager.cpp index d3f3482dc02..319915afd13 100644 --- a/lib/IR/LegacyPassManager.cpp +++ b/lib/IR/LegacyPassManager.cpp @@ -1684,7 +1684,7 @@ void MPPassManager::addLowerLevelRequiredPass(Pass *P, Pass *RequiredPass) { if (!FoundPass) { FoundPass = RequiredPass; // This should be guaranteed to add RequiredPass to the passmanager given - // that we checked for an avaiable analysis above. + // that we checked for an available analysis above. FPP->add(RequiredPass); } // Register P as the last user of FoundPass or RequiredPass. diff --git a/lib/Target/AArch64/AArch64FrameLowering.cpp b/lib/Target/AArch64/AArch64FrameLowering.cpp index 44903fcb381..f40744cd8fb 100644 --- a/lib/Target/AArch64/AArch64FrameLowering.cpp +++ b/lib/Target/AArch64/AArch64FrameLowering.cpp @@ -131,7 +131,7 @@ void AArch64FrameLowering::eliminateCallFramePseudoInstr( // FIXME: in-function stack adjustment for calls is limited to 24-bits // because there's no guaranteed temporary register available. // - // ADD/SUB (immediate) has only LSL #0 and LSL #12 avaiable. + // ADD/SUB (immediate) has only LSL #0 and LSL #12 available. // 1) For offset <= 12-bit, we use LSL #0 // 2) For 12-bit <= offset <= 24-bit, we use two instructions. One uses // LSL #0, and the other uses LSL #12. diff --git a/lib/Target/Mips/Mips16ISelLowering.cpp b/lib/Target/Mips/Mips16ISelLowering.cpp index 3ca0ffe23eb..9c35c613611 100644 --- a/lib/Target/Mips/Mips16ISelLowering.cpp +++ b/lib/Target/Mips/Mips16ISelLowering.cpp @@ -27,7 +27,7 @@ using namespace llvm; static cl::opt DontExpandCondPseudos16( "mips16-dont-expand-cond-pseudo", cl::init(false), - cl::desc("Dont expand conditional move related " + cl::desc("Don't expand conditional move related " "pseudos for Mips 16"), cl::Hidden); diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index 416de552b4a..368b1674b3f 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -2274,7 +2274,7 @@ SDValue MipsTargetLowering::lowerFP_TO_SINT(SDValue Op, // an argument. Otherwise, passed in A1, A2, A3 and stack. // f64 - Only passed in two aliased f32 registers if no int reg has been used // yet to hold an argument. Otherwise, use A2, A3 and stack. If A1 is -// not used, it must be shadowed. If only A3 is avaiable, shadow it and +// not used, it must be shadowed. If only A3 is available, shadow it and // go to stack. // // For vararg functions, all arguments are passed in A0, A1, A2, A3 and stack. diff --git a/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp b/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp index 05205fba1af..042944fc77d 100644 --- a/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp +++ b/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp @@ -27,7 +27,7 @@ using namespace llvm; static cl::opt UsePrecDivF32( "nvptx-prec-divf32", cl::ZeroOrMore, cl::Hidden, cl::desc("NVPTX Specifies: 0 use div.approx, 1 use div.full, 2 use" - " IEEE Compliant F32 div.rnd if avaiable."), + " IEEE Compliant F32 div.rnd if available."), cl::init(2)); static cl::opt diff --git a/lib/Target/R600/AMDILCFGStructurizer.cpp b/lib/Target/R600/AMDILCFGStructurizer.cpp index 647de66b633..ee6e8ecfb29 100644 --- a/lib/Target/R600/AMDILCFGStructurizer.cpp +++ b/lib/Target/R600/AMDILCFGStructurizer.cpp @@ -338,7 +338,7 @@ protected: void setLoopLandBlock(MachineLoop *LoopRep, MachineBasicBlock *MBB = nullptr); MachineBasicBlock *findNearestCommonPostDom(std::set&); - /// This is work around solution for findNearestCommonDominator not avaiable + /// This is work around solution for findNearestCommonDominator not available /// to post dom a proper fix should go to Dominators.h. MachineBasicBlock *findNearestCommonPostDom(MachineBasicBlock *MBB1, MachineBasicBlock *MBB2);