mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-29 10:32:47 +00:00
Tab completion is our friend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11957 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
83ba99ac46
commit
a85d46eea8
@ -18,8 +18,8 @@ include "../Target.td"
|
||||
// Register File Description
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
include "SparcV8Reg.td"
|
||||
include "SparcV8Instrs.td"
|
||||
include "SparcV8RegisterInfo.td"
|
||||
include "SparcV8InstrInfo.td"
|
||||
|
||||
def SparcV8InstrInfo : InstrInfo {
|
||||
let PHIInst = PHI;
|
||||
|
@ -28,8 +28,8 @@ class InstV8 : Instruction { // SparcV8 instruction baseline
|
||||
bit isPrivileged = 0; // Is this a privileged instruction?
|
||||
}
|
||||
|
||||
include "SparcV8Instrs_F2.td"
|
||||
include "SparcV8Instrs_F3.td"
|
||||
include "SparcV8InstrInfo_F2.td"
|
||||
include "SparcV8InstrInfo_F3.td"
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// Instructions
|
@ -18,8 +18,8 @@ include "../Target.td"
|
||||
// Register File Description
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
include "SparcV8Reg.td"
|
||||
include "SparcV8Instrs.td"
|
||||
include "SparcV8RegisterInfo.td"
|
||||
include "SparcV8InstrInfo.td"
|
||||
|
||||
def SparcV8InstrInfo : InstrInfo {
|
||||
let PHIInst = PHI;
|
||||
|
@ -28,8 +28,8 @@ class InstV8 : Instruction { // SparcV8 instruction baseline
|
||||
bit isPrivileged = 0; // Is this a privileged instruction?
|
||||
}
|
||||
|
||||
include "SparcV8Instrs_F2.td"
|
||||
include "SparcV8Instrs_F3.td"
|
||||
include "SparcV8InstrInfo_F2.td"
|
||||
include "SparcV8InstrInfo_F3.td"
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// Instructions
|
Loading…
Reference in New Issue
Block a user