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Unbreak MachineLICM for instructions that reference RIP on x86-64 too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82825 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -43,6 +43,7 @@ namespace {
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class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass {
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class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass {
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const TargetMachine *TM;
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const TargetMachine *TM;
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const TargetInstrInfo *TII;
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const TargetInstrInfo *TII;
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const TargetRegisterInfo *TRI;
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// Various analyses that we use...
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// Various analyses that we use...
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MachineLoopInfo *LI; // Current MachineLoopInfo
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MachineLoopInfo *LI; // Current MachineLoopInfo
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@@ -135,6 +136,7 @@ bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
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Changed = false;
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Changed = false;
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TM = &MF.getTarget();
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TM = &MF.getTarget();
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TII = TM->getInstrInfo();
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TII = TM->getInstrInfo();
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TRI = TM->getRegisterInfo();
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RegInfo = &MF.getRegInfo();
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RegInfo = &MF.getRegInfo();
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// Get our Loop information...
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// Get our Loop information...
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@@ -254,8 +256,25 @@ bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) {
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if (Reg == 0) continue;
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if (Reg == 0) continue;
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// Don't hoist an instruction that uses or defines a physical register.
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// Don't hoist an instruction that uses or defines a physical register.
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if (TargetRegisterInfo::isPhysicalRegister(Reg))
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if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
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// If this is a physical register use, we can't move it. If it is a def,
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// we can move it, but only if the def is dead.
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if (MO.isUse()) {
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// If the physreg has no defs anywhere, it's just an ambient register
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// and we can freely move its uses.
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if (!RegInfo->def_empty(Reg))
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return false;
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return false;
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// Check for a def among the register's aliases too.
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for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias)
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if (!RegInfo->def_empty(*Alias))
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return false;
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// Otherwise it's safe to move.
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continue;
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} else if (!MO.isDead()) {
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// A def that isn't dead. We can't move it.
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return false;
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}
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}
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if (!MO.isUse())
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if (!MO.isUse())
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continue;
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continue;
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42
test/CodeGen/X86/sink-hoist.ll
Normal file
42
test/CodeGen/X86/sink-hoist.ll
Normal file
@@ -0,0 +1,42 @@
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; RUN: llc < %s -march=x86-64 -asm-verbose=false | FileCheck %s
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; Currently, floating-point selects are lowered to CFG triangles.
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; This means that one side of the select is always unconditionally
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; evaluated, however with MachineSink we can sink the other side so
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; that it's conditionally evaluated.
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; CHECK: foo:
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; CHECK-NEXT: divsd
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: jne
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define double @foo(double %x, double %y, i1 %c) nounwind {
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%a = fdiv double %x, 3.2
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%b = fdiv double %y, 3.3
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%z = select i1 %c, double %a, double %b
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ret double %z
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}
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; Hoist floating-point constant-pool loads out of loops.
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; CHECK: bar:
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; CHECK: movsd
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; CHECK: align
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define void @bar(double* nocapture %p, i64 %n) nounwind {
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entry:
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%0 = icmp sgt i64 %n, 0
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br i1 %0, label %bb, label %return
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bb:
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%i.03 = phi i64 [ 0, %entry ], [ %3, %bb ]
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%scevgep = getelementptr double* %p, i64 %i.03
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%1 = load double* %scevgep, align 8
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%2 = fdiv double 3.200000e+00, %1
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store double %2, double* %scevgep, align 8
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%3 = add nsw i64 %i.03, 1
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%exitcond = icmp eq i64 %3, %n
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br i1 %exitcond, label %return, label %bb
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return:
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ret void
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}
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@@ -1,18 +0,0 @@
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; RUN: llc < %s -march=x86-64 -asm-verbose=false | FileCheck %s
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; Currently, floating-point selects are lowered to CFG triangles.
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; This means that one side of the select is always unconditionally
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; evaluated, however with MachineSink we can sink the other side so
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; that it's conditionally evaluated.
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; CHECK: foo:
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; CHECK-NEXT: divsd
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: jne
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define double @foo(double %x, double %y, i1 %c) nounwind {
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%a = fdiv double %x, 3.2
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%b = fdiv double %y, 3.3
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%z = select i1 %c, double %a, double %b
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ret double %z
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}
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