Guard private fields that are unused in Release builds with #ifndef NDEBUG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158608 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer
2012-06-16 21:48:13 +00:00
parent 2741d2cfdf
commit a978366339
4 changed files with 21 additions and 3 deletions

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@@ -158,7 +158,10 @@ class LexicalScope {
public: public:
LexicalScope(LexicalScope *P, const MDNode *D, const MDNode *I, bool A) LexicalScope(LexicalScope *P, const MDNode *D, const MDNode *I, bool A)
: Parent(P), Desc(D), InlinedAtLocation(I), AbstractScope(A), : Parent(P), Desc(D), InlinedAtLocation(I), AbstractScope(A),
LastInsn(0), FirstInsn(0), DFSIn(0), DFSOut(0), IndentLevel(0) { LastInsn(0), FirstInsn(0), DFSIn(0), DFSOut(0) {
#ifndef NDEBUG
IndentLevel = 0;
#endif
if (Parent) if (Parent)
Parent->addChild(this); Parent->addChild(this);
} }
@@ -241,7 +244,9 @@ private:
const MachineInstr *FirstInsn; // First instruction of this scope. const MachineInstr *FirstInsn; // First instruction of this scope.
unsigned DFSIn, DFSOut; // In & Out Depth use to determine unsigned DFSIn, DFSOut; // In & Out Depth use to determine
// scope nesting. // scope nesting.
#ifndef NDEBUG
mutable unsigned IndentLevel; // Private state for dump() mutable unsigned IndentLevel; // Private state for dump()
#endif
}; };
} // end llvm namespace } // end llvm namespace

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@@ -351,15 +351,21 @@ class ScheduleDAGMI : public ScheduleDAGInstrs {
IntervalPressure BotPressure; IntervalPressure BotPressure;
RegPressureTracker BotRPTracker; RegPressureTracker BotRPTracker;
#ifndef NDEBUG
/// The number of instructions scheduled so far. Used to cut off the /// The number of instructions scheduled so far. Used to cut off the
/// scheduler at the point determined by misched-cutoff. /// scheduler at the point determined by misched-cutoff.
unsigned NumInstrsScheduled; unsigned NumInstrsScheduled;
#endif
public: public:
ScheduleDAGMI(MachineSchedContext *C, MachineSchedStrategy *S): ScheduleDAGMI(MachineSchedContext *C, MachineSchedStrategy *S):
ScheduleDAGInstrs(*C->MF, *C->MLI, *C->MDT, /*IsPostRA=*/false, C->LIS), ScheduleDAGInstrs(*C->MF, *C->MLI, *C->MDT, /*IsPostRA=*/false, C->LIS),
AA(C->AA), RegClassInfo(C->RegClassInfo), SchedImpl(S), AA(C->AA), RegClassInfo(C->RegClassInfo), SchedImpl(S),
RPTracker(RegPressure), CurrentTop(), TopRPTracker(TopPressure), RPTracker(RegPressure), CurrentTop(), TopRPTracker(TopPressure),
CurrentBottom(), BotRPTracker(BotPressure), NumInstrsScheduled(0) {} CurrentBottom(), BotRPTracker(BotPressure) {
#ifndef NDEBUG
NumInstrsScheduled = 0;
#endif
}
~ScheduleDAGMI() { ~ScheduleDAGMI() {
delete SchedImpl; delete SchedImpl;

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@@ -64,8 +64,10 @@ class RABasic : public MachineFunctionPass, public RegAllocBase
// context // context
MachineFunction *MF; MachineFunction *MF;
#ifndef NDEBUG
// analyses // analyses
RenderMachineFunction *RMF; RenderMachineFunction *RMF;
#endif
// state // state
std::auto_ptr<Spiller> SpillerInstance; std::auto_ptr<Spiller> SpillerInstance;

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@@ -186,12 +186,17 @@ namespace {
JITEmitter &JE; JITEmitter &JE;
#ifndef NDEBUG
/// Instance of JIT corresponding to this Resolver. /// Instance of JIT corresponding to this Resolver.
JIT *TheJIT; JIT *TheJIT;
#endif
public: public:
explicit JITResolver(JIT &jit, JITEmitter &je) explicit JITResolver(JIT &jit, JITEmitter &je)
: state(&jit), nextGOTIndex(0), JE(je), TheJIT(&jit) { : state(&jit), nextGOTIndex(0), JE(je) {
#ifndef NDEBUG
TheJIT = &jit;
#endif
LazyResolverFn = jit.getJITInfo().getLazyResolverFunction(JITCompilerFn); LazyResolverFn = jit.getJITInfo().getLazyResolverFunction(JITCompilerFn);
} }