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[FastISel][X86] Refactor XALU folding. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211735 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Juergen Ributzka
parent
dd4814ec92
commit
a98f7c7720
@ -157,6 +157,9 @@ private:
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bool TryEmitSmallMemcpy(X86AddressMode DestAM,
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X86AddressMode SrcAM, uint64_t Len);
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std::pair<bool, X86::CondCode>
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foldX86XALUIntrinsic(const Instruction *I, const Value *Cond);
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};
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} // end anonymous namespace.
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@ -274,6 +277,61 @@ getX86SSECondtionCode(CmpInst::Predicate Predicate) {
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return std::make_pair(CC, NeedSwap);
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}
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/// \brief Check if it is possible to fold the condition from the XALU intrinsic
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/// into the user.
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std::pair<bool, X86::CondCode>
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X86FastISel::foldX86XALUIntrinsic(const Instruction *I, const Value *Cond) {
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if (!isa<ExtractValueInst>(Cond))
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return std::make_pair(false, X86::COND_INVALID);
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const auto *EV = cast<ExtractValueInst>(Cond);
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if (!isa<IntrinsicInst>(EV->getAggregateOperand()))
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return std::make_pair(false, X86::COND_INVALID);
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const auto *II = cast<IntrinsicInst>(EV->getAggregateOperand());
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MVT RetVT;
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const Function *Callee = II->getCalledFunction();
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Type *RetTy =
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cast<StructType>(Callee->getReturnType())->getTypeAtIndex(0U);
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if (!isTypeLegal(RetTy, RetVT))
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return std::make_pair(false, X86::COND_INVALID);
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if (RetVT != MVT::i32 && RetVT != MVT::i64)
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return std::make_pair(false, X86::COND_INVALID);
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X86::CondCode CC;
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switch (II->getIntrinsicID()) {
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default: return std::make_pair(false, X86::COND_INVALID);
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case Intrinsic::sadd_with_overflow:
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case Intrinsic::ssub_with_overflow:
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case Intrinsic::smul_with_overflow:
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case Intrinsic::umul_with_overflow: CC = X86::COND_O; break;
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case Intrinsic::uadd_with_overflow:
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case Intrinsic::usub_with_overflow: CC = X86::COND_B; break;
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}
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// Check if both instructions are in the same basic block.
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if (II->getParent() != I->getParent())
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return std::make_pair(false, X86::COND_INVALID);
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// Make sure nothing is in the way
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BasicBlock::const_iterator Start = I;
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BasicBlock::const_iterator End = II;
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for (auto Itr = std::prev(Start); Itr != End; --Itr) {
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// We only expect extractvalue instructions between the intrinsic and the
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// instruction to be selected.
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if (!isa<ExtractValueInst>(Itr))
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return std::make_pair(false, X86::COND_INVALID);
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// Check that the extractvalue operand comes from the intrinsic.
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const auto *EVI = cast<ExtractValueInst>(Itr);
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if (EVI->getAggregateOperand() != II)
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return std::make_pair(false, X86::COND_INVALID);
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}
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return std::make_pair(true, CC);
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}
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bool X86FastISel::isTypeLegal(Type *Ty, MVT &VT, bool AllowI1) {
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EVT evt = TLI.getValueType(Ty, /*HandleUnknown=*/true);
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if (evt == MVT::Other || !evt.isSimple())
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@ -1398,73 +1456,18 @@ bool X86FastISel::X86SelectBranch(const Instruction *I) {
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return true;
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}
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}
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} else if (auto *EV = dyn_cast<ExtractValueInst>(BI->getCondition())) {
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bool FoldIntrinsic = false;
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if (const auto *II = dyn_cast<IntrinsicInst>(EV->getAggregateOperand())) {
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switch (II->getIntrinsicID()) {
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default: break;
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case Intrinsic::sadd_with_overflow:
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case Intrinsic::uadd_with_overflow:
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case Intrinsic::ssub_with_overflow:
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case Intrinsic::usub_with_overflow:
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case Intrinsic::smul_with_overflow:
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case Intrinsic::umul_with_overflow: FoldIntrinsic = true; break;
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}
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// Check if both instructions are in the same basic block.
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if (FoldIntrinsic && (II->getParent() != I->getParent()))
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FoldIntrinsic = false;
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// Make sure nothing is in the way
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if (FoldIntrinsic) {
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BasicBlock::const_iterator Start = I;
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BasicBlock::const_iterator End = II;
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for (auto Itr = std::prev(Start); Itr != End; --Itr) {
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// We only expect extractvalue instructions between the intrinsic and
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// the branch.
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if (!isa<ExtractValueInst>(Itr)) {
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FoldIntrinsic = false;
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break;
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}
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// Check that the extractvalue operand comes from the intrinsic.
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const auto *EVI = cast<ExtractValueInst>(Itr);
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if (EVI->getAggregateOperand() != II) {
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FoldIntrinsic = false;
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break;
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}
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}
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}
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}
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} else {
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bool FoldIntrinsic;
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X86::CondCode CC;
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std::tie(FoldIntrinsic, CC) = foldX86XALUIntrinsic(BI, BI->getCondition());
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if (FoldIntrinsic) {
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MVT RetVT;
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const IntrinsicInst *II = cast<IntrinsicInst>(EV->getAggregateOperand());
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const Function *Callee = II->getCalledFunction();
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Type *RetTy =
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cast<StructType>(Callee->getReturnType())->getTypeAtIndex(0U);
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if (!isTypeLegal(RetTy, RetVT))
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return false;
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if (RetVT != MVT::i32 && RetVT != MVT::i64)
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return false;
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// Fake request the condition, otherwise the intrinsic might be completely
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// optimized away.
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unsigned TmpReg = getRegForValue(EV);
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unsigned TmpReg = getRegForValue(BI->getCondition());
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if (TmpReg == 0)
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return false;
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unsigned BranchOpc = 0;
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switch (II->getIntrinsicID()) {
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default: llvm_unreachable("Unexpected intrinsic instruction.");
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case Intrinsic::sadd_with_overflow:
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case Intrinsic::ssub_with_overflow:
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case Intrinsic::smul_with_overflow:
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case Intrinsic::umul_with_overflow: BranchOpc = X86::JO_4; break;
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case Intrinsic::uadd_with_overflow:
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case Intrinsic::usub_with_overflow: BranchOpc = X86::JB_4; break;
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}
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unsigned BranchOpc = X86::GetCondBranchFromCond(CC);
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BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(BranchOpc))
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.addMBB(TrueMBB);
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@ -1813,76 +1816,19 @@ bool X86FastISel::X86FastEmitCMoveSelect(const Instruction *I) {
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}
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}
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NeedTest = false;
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} else if (auto *EV = dyn_cast<ExtractValueInst>(Cond)) {
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bool FoldIntrinsic = false;
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if (const auto *II = dyn_cast<IntrinsicInst>(EV->getAggregateOperand())) {
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switch (II->getIntrinsicID()) {
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default: break;
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case Intrinsic::sadd_with_overflow:
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case Intrinsic::uadd_with_overflow:
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case Intrinsic::ssub_with_overflow:
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case Intrinsic::usub_with_overflow:
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case Intrinsic::smul_with_overflow:
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case Intrinsic::umul_with_overflow: FoldIntrinsic = true; break;
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}
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// Check if both instructions are in the same basic block.
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if (FoldIntrinsic && (II->getParent() != I->getParent()))
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FoldIntrinsic = false;
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// Make sure nothing is in the way
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if (FoldIntrinsic) {
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BasicBlock::const_iterator Start = I;
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BasicBlock::const_iterator End = II;
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for (auto Itr = std::prev(Start); Itr != End; --Itr) {
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// We only expect extractvalue instructions between the intrinsic and
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// the branch.
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if (!isa<ExtractValueInst>(Itr)) {
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FoldIntrinsic = false;
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break;
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}
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// Check that the extractvalue operand comes from the intrinsic.
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const auto *EVI = cast<ExtractValueInst>(Itr);
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if (EVI->getAggregateOperand() != II) {
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FoldIntrinsic = false;
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break;
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}
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}
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}
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}
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} else {
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bool FoldIntrinsic;
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X86::CondCode CC;
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std::tie(FoldIntrinsic, CC) = foldX86XALUIntrinsic(I, Cond);
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if (FoldIntrinsic) {
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MVT RetVT;
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const IntrinsicInst *II = cast<IntrinsicInst>(EV->getAggregateOperand());
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const Function *Callee = II->getCalledFunction();
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Type *RetTy =
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cast<StructType>(Callee->getReturnType())->getTypeAtIndex(0U);
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if (!isTypeLegal(RetTy, RetVT))
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return false;
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if (RetVT != MVT::i32 && RetVT != MVT::i64)
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return false;
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// Fake request the condition, otherwise the intrinsic might be completely
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// optimized away.
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unsigned TmpReg = getRegForValue(EV);
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unsigned TmpReg = getRegForValue(Cond);
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if (TmpReg == 0)
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return false;
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switch (II->getIntrinsicID()) {
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default: llvm_unreachable("Unexpected intrinsic instruction.");
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case Intrinsic::sadd_with_overflow:
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case Intrinsic::ssub_with_overflow:
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case Intrinsic::smul_with_overflow:
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case Intrinsic::umul_with_overflow:
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Opc = X86::getCMovFromCond(X86::COND_O, RC->getSize());
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break;
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case Intrinsic::uadd_with_overflow:
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case Intrinsic::usub_with_overflow:
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Opc = X86::getCMovFromCond(X86::COND_B, RC->getSize());
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break;
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}
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Opc = X86::getCMovFromCond(CC, RC->getSize());
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NeedTest = false;
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}
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}
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