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Expose base register for DwarfWriter. Refactor code accordingly.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27225 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Laskey
2006-03-28 13:48:33 +00:00
parent bf7637d590
commit a99791886d
14 changed files with 52 additions and 62 deletions
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11
lib/Target/Sparc/SparcRegisterInfo.cpp
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@@ -200,15 +200,8 @@ void SparcRegisterInfo::emitEpilogue(MachineFunction &MF,
BuildMI(MBB, MBBI, SP::RESTORErr, 2, SP::G0).addReg(SP::G0).addReg(SP::G0);
}
void SparcRegisterInfo::getLocation(MachineFunction &MF, unsigned Index,
MachineLocation &ML) const {
assert(0 && "Needs to be defined for target");
MachineFrameInfo *MFI = MF.getFrameInfo();
// FIXME - Needs to handle register variables.
// FIXME - Faking that llvm number is same as gcc numbering.
ML.set(getDwarfRegNum(SP::G1),
MFI->getObjectOffset(Index) + MFI->getStackSize());
unsigned SparcRegisterInfo::getFrameRegister(MachineFunction &MF) const {
return getDwarfRegNum(SP::G1);
}
#include "SparcGenRegisterInfo.inc"