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Update AArch64 backend to changed eliminateFrameIndex interface.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174086 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2013-01-31 20:46:53 +00:00
parent 2d95e43fd8
commit a9da5c50e2
2 changed files with 10 additions and 13 deletions
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22
lib/Target/AArch64/AArch64RegisterInfo.cpp
View File

@ -78,7 +78,9 @@ AArch64RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
void
AArch64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MBBI,
int SPAdj, RegScavenger *RS) const {
int SPAdj,
unsigned FIOperandNum,
RegScavenger *RS) const {
assert(SPAdj == 0 && "Cannot deal with nonzero SPAdj yet");
MachineInstr &MI = *MBBI;
MachineBasicBlock &MBB = *MI.getParent();
@ -87,12 +89,6 @@ AArch64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MBBI,
const AArch64FrameLowering *TFI =
static_cast<const AArch64FrameLowering *>(MF.getTarget().getFrameLowering());
unsigned i = 0;
while (!MI.getOperand(i).isFI()) {
++i;
assert(i < MI.getNumOperands() && "Instr doesn't have a FrameIndex Operand");
}
// In order to work out the base and offset for addressing, the FrameLowering
// code needs to know (sometimes) whether the instruction is storing/loading a
// callee-saved register, or whether it's a more generic
@ -107,7 +103,7 @@ AArch64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MBBI,
MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
}
int FrameIndex = MI.getOperand(i).getIndex();
int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
bool IsCalleeSaveOp = FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI;
unsigned FrameReg;
@ -115,13 +111,13 @@ AArch64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MBBI,
Offset = TFI->resolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj,
IsCalleeSaveOp);
Offset += MI.getOperand(i+1).getImm();
Offset += MI.getOperand(FIOperandNum + 1).getImm();
// DBG_VALUE instructions have no real restrictions so they can be handled
// easily.
if (MI.isDebugValue()) {
MI.getOperand(i).ChangeToRegister(FrameReg, /*isDef=*/ false);
MI.getOperand(i+1).ChangeToImmediate(Offset);
MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, /*isDef=*/ false);
MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
return;
}
@ -151,8 +147,8 @@ AArch64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MBBI,
// now this checks nothing has gone horribly wrong.
assert(Offset >= 0 && "Unexpected negative offset from SP");
MI.getOperand(i).ChangeToRegister(FrameReg, false, false, true);
MI.getOperand(i+1).ChangeToImmediate(Offset / OffsetScale);
MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false, false, true);
MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset / OffsetScale);
}
void

1
lib/Target/AArch64/AArch64RegisterInfo.h
View File

@ -41,6 +41,7 @@ public:
unsigned getFrameRegister(const MachineFunction &MF) const;
void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
unsigned FIOperandNum,
RegScavenger *Rs = NULL) const;
void eliminateCallFramePseudoInstr(MachineFunction &MF,