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80 columns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135047 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -841,8 +841,9 @@ bool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
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MI.getOperand(0).getReg())
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.addOperand(MI.getOperand(1))
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.addReg(0)
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.addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ? ARM_AM::lsr
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: ARM_AM::asr), 1)))
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.addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ?
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ARM_AM::lsr : ARM_AM::asr),
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1)))
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.addReg(ARM::CPSR, RegState::Define);
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MI.eraseFromParent();
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return true;
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@ -905,10 +906,10 @@ bool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
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const MachineOperand &MO1 = MI.getOperand(1);
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const GlobalValue *GV = MO1.getGlobal();
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unsigned TF = MO1.getTargetFlags();
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bool isARM = (Opcode != ARM::t2MOV_ga_pcrel && Opcode != ARM::t2MOV_ga_dyn);
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bool isARM = (Opcode != ARM::t2MOV_ga_pcrel && Opcode!=ARM::t2MOV_ga_dyn);
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bool isPIC = (Opcode != ARM::MOV_ga_dyn && Opcode != ARM::t2MOV_ga_dyn);
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unsigned LO16Opc = isARM ? ARM::MOVi16_ga_pcrel : ARM::t2MOVi16_ga_pcrel;
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unsigned HI16Opc = isARM ? ARM::MOVTi16_ga_pcrel : ARM::t2MOVTi16_ga_pcrel;
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unsigned HI16Opc = isARM ? ARM::MOVTi16_ga_pcrel :ARM::t2MOVTi16_ga_pcrel;
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unsigned LO16TF = isPIC
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? ARMII::MO_LO16_NONLAZY_PIC : ARMII::MO_LO16_NONLAZY;
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unsigned HI16TF = isPIC
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