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[SystemZ] Add CodeGen support for integer vector types
This the first of a series of patches to add CodeGen support exploiting the instructions of the z13 vector facility. This patch adds support for the native integer vector types (v16i8, v8i16, v4i32, v2i64). When the vector facility is present, we default to the new vector ABI. This is characterized by two major differences: - Vector types are passed/returned in vector registers (except for unnamed arguments of a variable-argument list function). - Vector types are at most 8-byte aligned. The reason for the choice of 8-byte vector alignment is that the hardware is able to efficiently load vectors at 8-byte alignment, and the ABI only guarantees 8-byte alignment of the stack pointer, so requiring any higher alignment for vectors would require dynamic stack re-alignment code. However, for compatibility with old code that may use vector types, when *not* using the vector facility, the old alignment rules (vector types are naturally aligned) remain in use. These alignment rules are not only implemented at the C language level (implemented in clang), but also at the LLVM IR level. This is done by selecting a different DataLayout string depending on whether the vector ABI is in effect or not. Based on a patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236521 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -21,15 +21,70 @@ extern "C" void LLVMInitializeSystemZTarget() {
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RegisterTargetMachine<SystemZTargetMachine> X(TheSystemZTarget);
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}
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// Determine whether we use the vector ABI.
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static bool UsesVectorABI(StringRef CPU, StringRef FS) {
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// We use the vector ABI whenever the vector facility is avaiable.
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// This is the case by default if CPU is z13 or later, and can be
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// overridden via "[+-]vector" feature string elements.
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bool VectorABI = true;
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if (CPU.empty() || CPU == "generic" ||
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CPU == "z10" || CPU == "z196" || CPU == "zEC12")
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VectorABI = false;
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SmallVector<StringRef, 3> Features;
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FS.split(Features, ",", -1, false /* KeepEmpty */);
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for (auto &Feature : Features) {
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if (Feature == "vector" || Feature == "+vector")
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VectorABI = true;
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if (Feature == "-vector")
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VectorABI = false;
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}
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return VectorABI;
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}
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static std::string computeDataLayout(StringRef TT, StringRef CPU,
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StringRef FS) {
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const Triple Triple(TT);
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bool VectorABI = UsesVectorABI(CPU, FS);
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std::string Ret = "";
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// Big endian.
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Ret += "E";
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// Data mangling.
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Ret += DataLayout::getManglingComponent(Triple);
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// Make sure that global data has at least 16 bits of alignment by
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// default, so that we can refer to it using LARL. We don't have any
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// special requirements for stack variables though.
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Ret += "-i1:8:16-i8:8:16";
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// 64-bit integers are naturally aligned.
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Ret += "-i64:64";
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// 128-bit floats are aligned only to 64 bits.
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Ret += "-f128:64";
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// When using the vector ABI, 128-bit vectors are also aligned to 64 bits.
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if (VectorABI)
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Ret += "-v128:64";
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// We prefer 16 bits of aligned for all globals; see above.
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Ret += "-a:8:16";
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// Integer registers are 32 or 64 bits.
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Ret += "-n32:64";
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return Ret;
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}
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SystemZTargetMachine::SystemZTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL)
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// Make sure that global data has at least 16 bits of alignment by
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// default, so that we can refer to it using LARL. We don't have any
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// special requirements for stack variables though.
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: LLVMTargetMachine(T, "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64",
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: LLVMTargetMachine(T, computeDataLayout(TT, CPU, FS),
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TT, CPU, FS, Options, RM, CM, OL),
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TLOF(make_unique<TargetLoweringObjectFileELF>()),
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Subtarget(TT, CPU, FS, *this) {
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