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ARM: Enforce decoding rules for VLDn instructions

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183731 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Amaury de la Vieuville
2013-06-11 08:14:14 +00:00
parent 3862709058
commit aa8003712e
5 changed files with 141 additions and 109 deletions
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70
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
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@ -241,16 +241,16 @@ static DecodeStatus DecodeBranchImmInstruction(MCInst &Inst,unsigned Insn,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeAddrMode6Operand(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeVLDST1Instruction(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeVLDST2Instruction(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeVLDST3Instruction(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeVLDST4Instruction(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeVST1Instruction(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeVST2Instruction(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeVST3Instruction(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeVST4Instruction(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Val,
@ -2430,47 +2430,55 @@ static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn,
return S;
}
static DecodeStatus DecodeVST1Instruction(MCInst& Inst, unsigned Insn,
uint64_t Addr, const void* Decoder) {
static DecodeStatus DecodeVLDST1Instruction(MCInst &Inst, unsigned Insn,
uint64_t Address, const void *Decoder) {
unsigned type = fieldFromInstruction(Insn, 8, 4);
unsigned align = fieldFromInstruction(Insn, 4, 2);
if(type == 7 && (align & 2)) return MCDisassembler::Fail;
if(type == 10 && align == 3) return MCDisassembler::Fail;
if(type == 6 && (align & 2)) return MCDisassembler::Fail;
return DecodeVSTInstruction(Inst, Insn, Addr, Decoder);
if (type == 6 && (align & 2)) return MCDisassembler::Fail;
if (type == 7 && (align & 2)) return MCDisassembler::Fail;
if (type == 10 && align == 3) return MCDisassembler::Fail;
unsigned load = fieldFromInstruction(Insn, 21, 1);
return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
: DecodeVSTInstruction(Inst, Insn, Address, Decoder);
}
static DecodeStatus DecodeVST2Instruction(MCInst& Inst, unsigned Insn,
uint64_t Addr, const void* Decoder) {
static DecodeStatus DecodeVLDST2Instruction(MCInst &Inst, unsigned Insn,
uint64_t Address, const void *Decoder) {
unsigned size = fieldFromInstruction(Insn, 6, 2);
if(size == 3) return MCDisassembler::Fail;
if (size == 3) return MCDisassembler::Fail;
unsigned type = fieldFromInstruction(Insn, 8, 4);
unsigned align = fieldFromInstruction(Insn, 4, 2);
if(type == 8 && align == 3) return MCDisassembler::Fail;
if(type == 9 && align == 3) return MCDisassembler::Fail;
return DecodeVSTInstruction(Inst, Insn, Addr, Decoder);
if (type == 8 && align == 3) return MCDisassembler::Fail;
if (type == 9 && align == 3) return MCDisassembler::Fail;
unsigned load = fieldFromInstruction(Insn, 21, 1);
return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
: DecodeVSTInstruction(Inst, Insn, Address, Decoder);
}
static DecodeStatus DecodeVST3Instruction(MCInst& Inst, unsigned Insn,
uint64_t Addr, const void* Decoder) {
static DecodeStatus DecodeVLDST3Instruction(MCInst &Inst, unsigned Insn,
uint64_t Address, const void *Decoder) {
unsigned size = fieldFromInstruction(Insn, 6, 2);
if(size == 3) return MCDisassembler::Fail;
if (size == 3) return MCDisassembler::Fail;
unsigned align = fieldFromInstruction(Insn, 4, 2);
if(align & 2) return MCDisassembler::Fail;
if (align & 2) return MCDisassembler::Fail;
return DecodeVSTInstruction(Inst, Insn, Addr, Decoder);
unsigned load = fieldFromInstruction(Insn, 21, 1);
return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
: DecodeVSTInstruction(Inst, Insn, Address, Decoder);
}
static DecodeStatus DecodeVST4Instruction(MCInst& Inst, unsigned Insn,
uint64_t Addr, const void* Decoder) {
static DecodeStatus DecodeVLDST4Instruction(MCInst &Inst, unsigned Insn,
uint64_t Address, const void *Decoder) {
unsigned size = fieldFromInstruction(Insn, 6, 2);
if(size == 3) return MCDisassembler::Fail;
if (size == 3) return MCDisassembler::Fail;
return DecodeVSTInstruction(Inst, Insn, Addr, Decoder);
unsigned load = fieldFromInstruction(Insn, 21, 1);
return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
: DecodeVSTInstruction(Inst, Insn, Address, Decoder);
}
static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Insn,