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MachineRegisterInfo can access TII off of the MachineFunction's
subtarget and so doesn't need the TargetMachine or to access via getSubtargetImpl. Update all callers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227160 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -593,7 +593,7 @@ public:
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/// virtual register, for example after removing instructions or splitting
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/// the live range.
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///
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bool recomputeRegClass(unsigned Reg, const TargetMachine&);
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bool recomputeRegClass(unsigned Reg);
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/// createVirtualRegister - Create and return a new virtual register in the
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/// function with the specified register class.
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@ -399,7 +399,7 @@ LiveRangeEdit::calculateRegClassAndHint(MachineFunction &MF,
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VirtRegAuxInfo VRAI(MF, LIS, Loops, MBFI);
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for (unsigned I = 0, Size = size(); I < Size; ++I) {
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LiveInterval &LI = LIS.getInterval(get(I));
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if (MRI.recomputeRegClass(LI.reg, MF.getTarget()))
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if (MRI.recomputeRegClass(LI.reg))
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DEBUG({
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const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
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dbgs() << "Inflated " << PrintReg(LI.reg) << " to "
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@ -61,8 +61,8 @@ MachineRegisterInfo::constrainRegClass(unsigned Reg,
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}
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bool
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MachineRegisterInfo::recomputeRegClass(unsigned Reg, const TargetMachine &TM) {
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const TargetInstrInfo *TII = TM.getSubtargetImpl()->getInstrInfo();
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MachineRegisterInfo::recomputeRegClass(unsigned Reg) {
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const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
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const TargetRegisterClass *OldRC = getRegClass(Reg);
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const TargetRegisterClass *NewRC =
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getTargetRegisterInfo()->getLargestLegalSuperClass(OldRC);
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@ -2756,7 +2756,7 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
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unsigned Reg = InflateRegs[i];
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if (MRI->reg_nodbg_empty(Reg))
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continue;
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if (MRI->recomputeRegClass(Reg, *TM)) {
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if (MRI->recomputeRegClass(Reg)) {
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DEBUG(dbgs() << PrintReg(Reg) << " inflated to "
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<< TRI->getRegClassName(MRI->getRegClass(Reg)) << '\n');
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LiveInterval &LI = LIS->getInterval(Reg);
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