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PR9377: Handle x86 str with register operand in a way consistent with gas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126970 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -207,10 +207,15 @@ def LSL64rr : RI<0x03, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src),
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def INVLPG : I<0x01, MRM7m, (outs), (ins i8mem:$addr), "invlpg\t$addr", []>, TB;
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def STRr : I<0x00, MRM1r, (outs GR16:$dst), (ins),
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"str{w}\t{$dst}", []>, TB;
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def STRm : I<0x00, MRM1m, (outs i16mem:$dst), (ins),
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"str{w}\t{$dst}", []>, TB;
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def STR16r : I<0x00, MRM1r, (outs GR16:$dst), (ins),
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"str{w}\t{$dst}", []>, TB, OpSize;
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def STR32r : I<0x00, MRM1r, (outs GR32:$dst), (ins),
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"str{l}\t{$dst}", []>, TB;
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def STR64r : RI<0x00, MRM1r, (outs GR64:$dst), (ins),
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"str{q}\t{$dst}", []>, TB;
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def STRm : I<0x00, MRM1m, (outs i16mem:$dst), (ins),
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"str{w}\t{$dst}", []>, TB;
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def LTRr : I<0x00, MRM3r, (outs), (ins GR16:$src),
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"ltr{w}\t{$src}", []>, TB;
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def LTRm : I<0x00, MRM3m, (outs), (ins i16mem:$src),
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@ -816,3 +816,11 @@ pshufw $90, %mm4, %mm0
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// CHECK: loopne 0
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// CHECK: encoding: [0xe0,A]
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loopnz 0
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// CHECK: strw
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// CHECK: encoding: [0x66,0x0f,0x00,0xc8]
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str %ax
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// CHECK: strl
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// CHECK: encoding: [0x0f,0x00,0xc8]
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str %eax
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