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Update live-in lists when splitting critical edges.
Fixes PR10814. Patch by Jan Sjödin! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141960 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -571,6 +571,11 @@ MachineBasicBlock::SplitCriticalEdge(MachineBasicBlock *Succ, Pass *P) {
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if (i->getOperand(ni+1).getMBB() == this)
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i->getOperand(ni+1).setMBB(NMBB);
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// Inherit live-ins from the successor
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for (MachineBasicBlock::livein_iterator I = Succ->livein_begin(),
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E = Succ->livein_end(); I != E; ++I)
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NMBB->addLiveIn(*I);
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// Update LiveVariables.
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if (LV) {
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// Restore kills of virtual registers that were killed by the terminators.
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74
test/CodeGen/X86/MachineSink-eflags.ll
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74
test/CodeGen/X86/MachineSink-eflags.ll
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@ -0,0 +1,74 @@
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; RUN: llc < %s | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-pc-linux"
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%0 = type <{ i64, i64, %1, %1, [21 x %2] }>
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%1 = type <{ i64, i64, i64 }>
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%2 = type <{ i32, i32, i8 addrspace(2)* }>
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%3 = type { i8*, i8*, i8*, i8*, i32 }
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%4 = type <{ %5*, i8*, i32, i32, [4 x i64], [4 x i64], [4 x i64], [4 x i64], [4 x i64] }>
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%5 = type <{ void (i32)*, i8*, i32 (i8*, ...)* }>
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define void @foo(i8* nocapture %_stubArgs) nounwind {
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entry:
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%i0 = alloca i8*, align 8
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%i2 = alloca i8*, align 8
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%b.i = alloca [16 x <2 x double>], align 16
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%conv = bitcast i8* %_stubArgs to i32*
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%tmp1 = load i32* %conv, align 4
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%ptr8 = getelementptr i8* %_stubArgs, i64 16
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%i4 = bitcast i8* %ptr8 to <2 x double>*
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%ptr20 = getelementptr i8* %_stubArgs, i64 48
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%i7 = bitcast i8* %ptr20 to <2 x double> addrspace(1)**
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%tmp21 = load <2 x double> addrspace(1)** %i7, align 8
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%ptr28 = getelementptr i8* %_stubArgs, i64 64
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%i9 = bitcast i8* %ptr28 to i32*
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%tmp29 = load i32* %i9, align 4
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%ptr32 = getelementptr i8* %_stubArgs, i64 68
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%i10 = bitcast i8* %ptr32 to i32*
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%tmp33 = load i32* %i10, align 4
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%tmp17.i = mul i32 10, 20
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%tmp19.i = add i32 %tmp17.i, %tmp33
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%conv21.i = zext i32 %tmp19.i to i64
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%tmp6.i = and i32 42, -32
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%tmp42.i = add i32 %tmp6.i, 17
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%tmp44.i = insertelement <2 x i32> undef, i32 %tmp42.i, i32 1
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%tmp96676677.i = or i32 17, -4
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%ptr4438.i = getelementptr inbounds [16 x <2 x double>]* %b.i, i64 0, i64 0
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%arrayidx4506.i = getelementptr [16 x <2 x double>]* %b.i, i64 0, i64 4
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%tmp52.i = insertelement <2 x i32> %tmp44.i, i32 0, i32 0
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%tmp78.i = extractelement <2 x i32> %tmp44.i, i32 1
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%tmp97.i = add i32 %tmp78.i, %tmp96676677.i
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%tmp99.i = insertelement <2 x i32> %tmp52.i, i32 %tmp97.i, i32 1
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%tmp154.i = extractelement <2 x i32> %tmp99.i, i32 1
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%tmp156.i = extractelement <2 x i32> %tmp52.i, i32 0
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%tmp158.i = urem i32 %tmp156.i, %tmp1
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%i38 = mul i32 %tmp154.i, %tmp29
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%i39 = add i32 %tmp158.i, %i38
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%conv160.i = zext i32 %i39 to i64
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%tmp22.sum652.i = add i64 %conv160.i, %conv21.i
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%arrayidx161.i = getelementptr <2 x double> addrspace(1)* %tmp21, i64 %tmp22.sum652.i
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%tmp162.i = load <2 x double> addrspace(1)* %arrayidx161.i, align 16
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%tmp222.i = add i32 %tmp154.i, 1
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%i43 = mul i32 %tmp222.i, %tmp29
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%i44 = add i32 %tmp158.i, %i43
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%conv228.i = zext i32 %i44 to i64
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%tmp22.sum656.i = add i64 %conv228.i, %conv21.i
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%arrayidx229.i = getelementptr <2 x double> addrspace(1)* %tmp21, i64 %tmp22.sum656.i
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%tmp230.i = load <2 x double> addrspace(1)* %arrayidx229.i, align 16
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%cmp432.i = icmp ult i32 %tmp156.i, %tmp1
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; %shl.i should not be sinked below the compare.
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; CHECK: cmpl
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; CHECK-NOT: shlq
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%cond.i = select i1 %cmp432.i, <2 x double> %tmp162.i, <2 x double> zeroinitializer
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store <2 x double> %cond.i, <2 x double>* %ptr4438.i, align 16
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%cond448.i = select i1 %cmp432.i, <2 x double> %tmp230.i, <2 x double> zeroinitializer
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store <2 x double> %cond448.i, <2 x double>* %arrayidx4506.i, align 16
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ret void
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}
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@ -6,12 +6,37 @@
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-apple-darwin10.0.0"
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; FIXME: This test could generate this code:
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;
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; ## BB#0: ## %entry
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; testq %rdi, %rdi
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; jns LBB0_2
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; ## BB#1:
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; movq %rdi, %rax
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; shrq %rax
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; andq $1, %rdi
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; orq %rax, %rdi
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; cvtsi2ssq %rdi, %xmm0
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; addss %xmm0, %xmm0
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; ret
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; LBB0_2: ## %entry
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; cvtsi2ssq %rdi, %xmm0
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; ret
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;
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; The blocks come from lowering:
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;
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; %vreg7<def> = CMOV_FR32 %vreg6<kill>, %vreg5<kill>, 15, %EFLAGS<imp-use>; FR32:%vreg7,%vreg6,%vreg5
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;
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; If the instruction had an EFLAGS<kill> flag, it wouldn't need to mark EFLAGS
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; as live-in on the new blocks, and machine sinking would be able to sink
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; everything below the test.
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; CHECK: shrq
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; CHECK: andq
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; CHECK-NEXT: orq
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; CHECK: testq %rdi, %rdi
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; CHECK-NEXT: jns LBB0_2
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; CHECK: shrq
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; CHECK-NEXT: andq
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; CHECK-NEXT: orq
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; CHECK-NEXT: cvtsi2ss
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; CHECK: cvtsi2ss
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; CHECK: LBB0_2
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; CHECK-NEXT: cvtsi2ss
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define float @test(i64 %a) {
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