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For PR1097:

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Enable complex addressing modes on 64-bit platforms involving two induction
variables by keeping a size and scale in 64-bits not 32.
Patch by Dan Gohman.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33011 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Reid Spencer
2007-01-08 16:17:51 +00:00
parent fbe7ae9e3c
commit ac8cdf79e7
1 changed files with 1 additions and 1 deletions
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2
lib/Transforms/Scalar/LoopStrengthReduce.cpp
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@ -893,7 +893,7 @@ unsigned LoopStrengthReduce::CheckForIVReuse(const SCEVHandle &Stride,
if (unsigned(abs(SInt)) < Scale || (SInt % Scale) != 0) if (unsigned(abs(SInt)) < Scale || (SInt % Scale) != 0)
continue; continue;
std::map<SCEVHandle, IVsOfOneStride>::iterator SI = std::map<SCEVHandle, IVsOfOneStride>::iterator SI =
IVsByStride.find(SCEVUnknown::getIntegerSCEV(SInt/Scale, Type::Int32Ty)); IVsByStride.find(SCEVUnknown::getIntegerSCEV(SInt/Scale, UIntPtrTy));
if (SI == IVsByStride.end()) if (SI == IVsByStride.end())
continue; continue;
for (std::vector<IVExpr>::iterator II = SI->second.IVs.begin(), for (std::vector<IVExpr>::iterator II = SI->second.IVs.begin(),