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Delete useless trailing semicolons.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92740 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2010-01-05 17:55:26 +00:00
parent ba25f0924e
commit aceba31b7a
57 changed files with 102 additions and 102 deletions
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4
test/Analysis/BasicAA/2007-11-05-SizeCrash.ll
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@@ -23,9 +23,9 @@ entry:
cond_true34: ; preds = %entry cond_true34: ; preds = %entry
%tmp631 = getelementptr %struct.usb_hcd* %hcd, i32 0, i32 2, i64 %tmp631 = getelementptr %struct.usb_hcd* %hcd, i32 0, i32 2, i64
2305843009213693950 ; <i64*> [#uses=1] 2305843009213693950 ; <i64*> [#uses=1]
%tmp70 = bitcast i64* %tmp631 to %struct.device** ; %tmp70 = bitcast i64* %tmp631 to %struct.device**
%tmp71 = load %struct.device** %tmp70, align 8 ; %tmp71 = load %struct.device** %tmp70, align 8
ret i32 undef ret i32 undef

6
test/Assembler/vector-cmp.ll
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@@ -9,8 +9,8 @@ entry:
ret <4 x i1> %cmp ret <4 x i1> %cmp
} }
global <4 x i1> icmp slt ( <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32> <i32 1, i32 2, i32 1, i32 2> ) ; global <4 x i1> icmp slt ( <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32> <i32 1, i32 2, i32 1, i32 2> )
@B = external global i32; @B = external global i32
global <4 x i1> icmp slt ( <4 x i32> <i32 ptrtoint (i32 * @B to i32), i32 1, i32 1, i32 1>, <4 x i32> <i32 1, i32 2, i32 1, i32 2> ) ; global <4 x i1> icmp slt ( <4 x i32> <i32 ptrtoint (i32 * @B to i32), i32 1, i32 1, i32 1>, <4 x i32> <i32 1, i32 2, i32 1, i32 2> )

2
test/CodeGen/ARM/private.ll
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@@ -12,7 +12,7 @@ define private void @foo() {
ret void ret void
} }
@baz = private global i32 4; @baz = private global i32 4
define i32 @bar() { define i32 @bar() {
call void @foo() call void @foo()

2
test/CodeGen/ARM/tail-opts.ll
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@@ -9,7 +9,7 @@ declare i1 @qux()
@GHJK = global i32 0 @GHJK = global i32 0
declare i8* @choose(i8*, i8*); declare i8* @choose(i8*, i8*)
; BranchFolding should tail-duplicate the indirect jump to avoid ; BranchFolding should tail-duplicate the indirect jump to avoid
; redundant branching. ; redundant branching.

2
test/CodeGen/Alpha/private.ll
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@@ -12,7 +12,7 @@ define private void @foo() {
ret void ret void
} }
@baz = private global i32 4; @baz = private global i32 4
define i32 @bar() { define i32 @bar() {
call void @foo() call void @foo()

6
test/CodeGen/Blackfin/ct32.ll
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@@ -6,15 +6,15 @@ declare i32 @llvm.ctpop.i32(i32)
define i32 @ctlztest(i32 %B) { define i32 @ctlztest(i32 %B) {
%b = call i32 @llvm.ctlz.i32( i32 %B ) %b = call i32 @llvm.ctlz.i32( i32 %B )
ret i32 %b; ret i32 %b
} }
define i32 @cttztest(i32 %B) { define i32 @cttztest(i32 %B) {
%b = call i32 @llvm.cttz.i32( i32 %B ) %b = call i32 @llvm.cttz.i32( i32 %B )
ret i32 %b; ret i32 %b
} }
define i32 @ctpoptest(i32 %B) { define i32 @ctpoptest(i32 %B) {
%b = call i32 @llvm.ctpop.i32( i32 %B ) %b = call i32 @llvm.ctpop.i32( i32 %B )
ret i32 %b; ret i32 %b
} }

6
test/CodeGen/Blackfin/ct64.ll
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@@ -6,15 +6,15 @@ declare i64 @llvm.ctpop.i64(i64)
define i64 @ctlztest(i64 %B) { define i64 @ctlztest(i64 %B) {
%b = call i64 @llvm.ctlz.i64( i64 %B ) %b = call i64 @llvm.ctlz.i64( i64 %B )
ret i64 %b; ret i64 %b
} }
define i64 @cttztest(i64 %B) { define i64 @cttztest(i64 %B) {
%b = call i64 @llvm.cttz.i64( i64 %B ) %b = call i64 @llvm.cttz.i64( i64 %B )
ret i64 %b; ret i64 %b
} }
define i64 @ctpoptest(i64 %B) { define i64 @ctpoptest(i64 %B) {
%b = call i64 @llvm.ctpop.i64( i64 %B ) %b = call i64 @llvm.ctpop.i64( i64 %B )
ret i64 %b; ret i64 %b
} }

6
test/CodeGen/Blackfin/ctlz16.ll
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@@ -4,15 +4,15 @@ declare i16 @llvm.ctlz.i16(i16)
define i16 @ctlztest(i16 %B) { define i16 @ctlztest(i16 %B) {
%b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1] %b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1]
ret i16 %b; ret i16 %b
} }
define i16 @ctlztest_z(i16 zeroext %B) { define i16 @ctlztest_z(i16 zeroext %B) {
%b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1] %b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1]
ret i16 %b; ret i16 %b
} }
define i16 @ctlztest_s(i16 signext %B) { define i16 @ctlztest_s(i16 signext %B) {
%b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1] %b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1]
ret i16 %b; ret i16 %b
} }

6
test/CodeGen/Blackfin/ctpop16.ll
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@@ -4,15 +4,15 @@ declare i16 @llvm.ctpop.i16(i16)
define i16 @ctpoptest(i16 %B) { define i16 @ctpoptest(i16 %B) {
%b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1] %b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1]
ret i16 %b; ret i16 %b
} }
define i16 @ctpoptest_z(i16 zeroext %B) { define i16 @ctpoptest_z(i16 zeroext %B) {
%b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1] %b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1]
ret i16 %b; ret i16 %b
} }
define i16 @ctpoptest_s(i16 signext %B) { define i16 @ctpoptest_s(i16 signext %B) {
%b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1] %b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1]
ret i16 %b; ret i16 %b
} }

6
test/CodeGen/Blackfin/cttz16.ll
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@@ -4,15 +4,15 @@ declare i16 @llvm.cttz.i16(i16)
define i16 @cttztest(i16 %B) { define i16 @cttztest(i16 %B) {
%b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1] %b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1]
ret i16 %b; ret i16 %b
} }
define i16 @cttztest_z(i16 zeroext %B) { define i16 @cttztest_z(i16 zeroext %B) {
%b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1] %b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1]
ret i16 %b; ret i16 %b
} }
define i16 @cttztest_s(i16 signext %B) { define i16 @cttztest_s(i16 signext %B) {
%b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1] %b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1]
ret i16 %b; ret i16 %b
} }

2
test/CodeGen/CellSPU/dp_farith.ll
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@@ -83,7 +83,7 @@ define double @d_fnms_2(double %arg1, double %arg2, double %arg3) {
; FNMS: - (a * b - c) => c - (a * b) ; FNMS: - (a * b - c) => c - (a * b)
define <2 x double> @d_fnms_vec_1(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) { define <2 x double> @d_fnms_vec_1(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) {
%A = fmul <2 x double> %arg1, %arg2 %A = fmul <2 x double> %arg1, %arg2
%B = fsub <2 x double> %arg3, %A ; %B = fsub <2 x double> %arg3, %A
ret <2 x double> %B ret <2 x double> %B
} }

2
test/CodeGen/CellSPU/private.ll
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@@ -13,7 +13,7 @@ define private void @foo() {
ret void ret void
} }
@baz = private global i32 4; @baz = private global i32 4
define i32 @bar() { define i32 @bar() {
call void @foo() call void @foo()

2
test/CodeGen/Generic/2009-03-29-SoftFloatVectorExtract.ll
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@@ -1,7 +1,7 @@
; RUN: llc < %s -soft-float ; RUN: llc < %s -soft-float
; PR3899 ; PR3899
@m = external global <2 x double>; @m = external global <2 x double>
define double @vector_ex() nounwind { define double @vector_ex() nounwind {
%v = load <2 x double>* @m %v = load <2 x double>* @m

8
test/CodeGen/MSP430/bit.ll
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@@ -2,8 +2,8 @@
target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32" target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32"
target triple = "msp430-generic-generic" target triple = "msp430-generic-generic"
@foo8 = external global i8; @foo8 = external global i8
@bar8 = external global i8; @bar8 = external global i8
define i8 @bitbrr(i8 %a, i8 %b) nounwind { define i8 @bitbrr(i8 %a, i8 %b) nounwind {
%t1 = and i8 %a, %b %t1 = and i8 %a, %b
@@ -83,8 +83,8 @@ define i8 @bitbmm() nounwind {
; CHECK: bitbmm: ; CHECK: bitbmm:
; CHECK: bit.b &bar8, &foo8 ; CHECK: bit.b &bar8, &foo8
@foo16 = external global i16; @foo16 = external global i16
@bar16 = external global i16; @bar16 = external global i16
define i16 @bitwrr(i16 %a, i16 %b) nounwind { define i16 @bitwrr(i16 %a, i16 %b) nounwind {
%t1 = and i16 %a, %b %t1 = and i16 %a, %b

2
test/CodeGen/Mips/private.ll
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@@ -12,7 +12,7 @@ define private void @foo() {
ret void ret void
} }
@baz = private global i32 4; @baz = private global i32 4
define i32 @bar() { define i32 @bar() {
call void @foo() call void @foo()

2
test/CodeGen/PowerPC/private.ll
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@@ -15,7 +15,7 @@ define private void @foo() nounwind {
ret void ret void
} }
@baz = private global i32 4; @baz = private global i32 4
define i32 @bar() nounwind { define i32 @bar() nounwind {
call void @foo() call void @foo()

2
test/CodeGen/SPARC/private.ll
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@@ -12,7 +12,7 @@ define private void @foo() {
ret void ret void
} }
@baz = private global i32 4; @baz = private global i32 4
define i32 @bar() { define i32 @bar() {
call void @foo() call void @foo()

16
test/CodeGen/Thumb2/thumb2-add.ll
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@@ -8,43 +8,43 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep lsl | grep #8 ; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep lsl | grep #8
define i32 @t2ADDrc_255(i32 %lhs) { define i32 @t2ADDrc_255(i32 %lhs) {
%Rd = add i32 %lhs, 255; %Rd = add i32 %lhs, 255
ret i32 %Rd ret i32 %Rd
} }
define i32 @t2ADDrc_256(i32 %lhs) { define i32 @t2ADDrc_256(i32 %lhs) {
%Rd = add i32 %lhs, 256; %Rd = add i32 %lhs, 256
ret i32 %Rd ret i32 %Rd
} }
define i32 @t2ADDrc_257(i32 %lhs) { define i32 @t2ADDrc_257(i32 %lhs) {
%Rd = add i32 %lhs, 257; %Rd = add i32 %lhs, 257
ret i32 %Rd ret i32 %Rd
} }
define i32 @t2ADDrc_4094(i32 %lhs) { define i32 @t2ADDrc_4094(i32 %lhs) {
%Rd = add i32 %lhs, 4094; %Rd = add i32 %lhs, 4094
ret i32 %Rd ret i32 %Rd
} }
define i32 @t2ADDrc_4095(i32 %lhs) { define i32 @t2ADDrc_4095(i32 %lhs) {
%Rd = add i32 %lhs, 4095; %Rd = add i32 %lhs, 4095
ret i32 %Rd ret i32 %Rd
} }
define i32 @t2ADDrc_4096(i32 %lhs) { define i32 @t2ADDrc_4096(i32 %lhs) {
%Rd = add i32 %lhs, 4096; %Rd = add i32 %lhs, 4096
ret i32 %Rd ret i32 %Rd
} }
define i32 @t2ADDrr(i32 %lhs, i32 %rhs) { define i32 @t2ADDrr(i32 %lhs, i32 %rhs) {
%Rd = add i32 %lhs, %rhs; %Rd = add i32 %lhs, %rhs
ret i32 %Rd ret i32 %Rd
} }
define i32 @t2ADDrs(i32 %lhs, i32 %rhs) { define i32 @t2ADDrs(i32 %lhs, i32 %rhs) {
%tmp = shl i32 %rhs, 8 %tmp = shl i32 %rhs, 8
%Rd = add i32 %lhs, %tmp; %Rd = add i32 %lhs, %tmp
ret i32 %Rd ret i32 %Rd
} }

2
test/CodeGen/X86/darwin-bzero.ll
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@@ -3,6 +3,6 @@
declare void @llvm.memset.i32(i8*, i8, i32, i32) declare void @llvm.memset.i32(i8*, i8, i32, i32)
define void @foo(i8* %p, i32 %len) { define void @foo(i8* %p, i32 %len) {
call void @llvm.memset.i32(i8* %p, i8 0, i32 %len, i32 1); call void @llvm.memset.i32(i8* %p, i8 0, i32 %len, i32 1)
ret void ret void
} }

8
test/CodeGen/X86/extractelement-shuffle.ll
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@@ -6,8 +6,8 @@
; through the 3rd mask element, which doesn't exist. ; through the 3rd mask element, which doesn't exist.
define i32 @update(<2 x i64> %val1, <2 x i64> %val2) nounwind readnone { define i32 @update(<2 x i64> %val1, <2 x i64> %val2) nounwind readnone {
entry: entry:
%shuf = shufflevector <2 x i64> %val1, <2 x i64> %val2, <2 x i32> <i32 0, i32 3>; %shuf = shufflevector <2 x i64> %val1, <2 x i64> %val2, <2 x i32> <i32 0, i32 3>
%bit = bitcast <2 x i64> %shuf to <4 x i32>; %bit = bitcast <2 x i64> %shuf to <4 x i32>
%res = extractelement <4 x i32> %bit, i32 3; %res = extractelement <4 x i32> %bit, i32 3
ret i32 %res; ret i32 %res
} }

2
test/CodeGen/X86/mul-legalize.ll
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@@ -19,6 +19,6 @@ return:
ret void ret void
} }
declare i1 @report__equal(i32 %x, i32 %y) nounwind; declare i1 @report__equal(i32 %x, i32 %y) nounwind
declare void @abort() declare void @abort()

2
test/CodeGen/X86/private.ll
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@@ -11,7 +11,7 @@ define private void @foo() {
ret void ret void
} }
@baz = private global i32 4; @baz = private global i32 4
define i32 @bar() { define i32 @bar() {
call void @foo() call void @foo()

2
test/CodeGen/X86/tail-opts.ll
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@@ -55,7 +55,7 @@ altret:
ret void ret void
} }
declare i8* @choose(i8*, i8*); declare i8* @choose(i8*, i8*)
; BranchFolding should tail-duplicate the indirect jump to avoid ; BranchFolding should tail-duplicate the indirect jump to avoid
; redundant branching. ; redundant branching.

2
test/CodeGen/X86/vec_shuffle-22.ll
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@@ -9,7 +9,7 @@ define <4 x float> @t1(<4 x float> %a) nounwind {
define <4 x i32> @t2(<4 x i32>* %a) nounwind { define <4 x i32> @t2(<4 x i32>* %a) nounwind {
; CHECK: pshufd ; CHECK: pshufd
; CHECK: ret ; CHECK: ret
%tmp1 = load <4 x i32>* %a; %tmp1 = load <4 x i32>* %a
%tmp2 = shufflevector <4 x i32> %tmp1, <4 x i32> undef, <4 x i32> < i32 0, i32 1, i32 0, i32 1 > ; <<4 x i32>> [#uses=1] %tmp2 = shufflevector <4 x i32> %tmp1, <4 x i32> undef, <4 x i32> < i32 0, i32 1, i32 0, i32 1 > ; <<4 x i32>> [#uses=1]
ret <4 x i32> %tmp2 ret <4 x i32> %tmp2
} }

18
test/CodeGen/X86/vec_shuffle-25.ll
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@@ -19,16 +19,16 @@ entry:
%unpcklps8 = shufflevector <4 x float> %p1, <4 x float> %p3, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=2] %unpcklps8 = shufflevector <4 x float> %p1, <4 x float> %p3, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=2]
%unpckhps11 = shufflevector <4 x float> %p1, <4 x float> %p3, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=2] %unpckhps11 = shufflevector <4 x float> %p1, <4 x float> %p3, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=2]
%unpcklps14 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1] %unpcklps14 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
%unpcklps14a = shufflevector <4 x float> %unpcklps14, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>; %unpcklps14a = shufflevector <4 x float> %unpcklps14, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%unpckhps17 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1] %unpckhps17 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
%unpckhps17a = shufflevector <4 x float> %unpckhps17, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>; %unpckhps17a = shufflevector <4 x float> %unpckhps17, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%r1 = shufflevector <16 x float> %unpcklps14a, <16 x float> %unpckhps17a, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>; %r1 = shufflevector <16 x float> %unpcklps14a, <16 x float> %unpckhps17a, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%unpcklps20 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1] %unpcklps20 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
%unpcklps20a = shufflevector <4 x float> %unpcklps20, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>; %unpcklps20a = shufflevector <4 x float> %unpcklps20, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%r2 = shufflevector <16 x float> %r1, <16 x float> %unpcklps20a, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 12, i32 13, i32 14, i32 15>; %r2 = shufflevector <16 x float> %r1, <16 x float> %unpcklps20a, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 12, i32 13, i32 14, i32 15>
%unpckhps23 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1] %unpckhps23 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
%unpckhps23a = shufflevector <4 x float> %unpckhps23, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>; %unpckhps23a = shufflevector <4 x float> %unpckhps23, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%r3 = shufflevector <16 x float> %r2, <16 x float> %unpckhps23a, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>; %r3 = shufflevector <16 x float> %r2, <16 x float> %unpckhps23a, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
%r4 = shufflevector <16 x float> %r3, <16 x float> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>; %r4 = shufflevector <16 x float> %r3, <16 x float> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
ret <8 x float> %r4; ret <8 x float> %r4
} }

6
test/CodeGen/X86/vec_shuffle-26.ll
View File

@@ -20,10 +20,10 @@ entry:
%unpckhps11 = shufflevector <4 x float> %p1, <4 x float> %p3, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=2] %unpckhps11 = shufflevector <4 x float> %p1, <4 x float> %p3, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=2]
%unpcklps14 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1] %unpcklps14 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
%unpckhps17 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1] %unpckhps17 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
%r1 = shufflevector <4 x float> %unpcklps14, <4 x float> %unpckhps17, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >; %r1 = shufflevector <4 x float> %unpcklps14, <4 x float> %unpckhps17, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >
%unpcklps20 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1] %unpcklps20 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
%unpckhps23 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1] %unpckhps23 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
%r2 = shufflevector <4 x float> %unpcklps20, <4 x float> %unpckhps23, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >; %r2 = shufflevector <4 x float> %unpcklps20, <4 x float> %unpckhps23, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >
; %r3 = shufflevector <8 x float> %r1, <8 x float> %r2, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15 >; ; %r3 = shufflevector <8 x float> %r1, <8 x float> %r2, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15 >;
ret <8 x float> %r2; ret <8 x float> %r2
} }

2
test/CodeGen/X86/widen_select-1.ll
View File

@@ -6,7 +6,7 @@
define void @select(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind { define void @select(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind {
entry: entry:
%x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2 %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2
%val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >; %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
store <6 x i32> %val, <6 x i32>* %dst.addr store <6 x i32> %val, <6 x i32>* %dst.addr
ret void ret void
} }

2
test/CodeGen/X86/widen_shuffle-1.ll
View File

@@ -7,7 +7,7 @@
define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind { define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind {
entry: entry:
%x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 1, i32 2> %x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 1, i32 2>
%val = fadd <3 x float> %x, %src2; %val = fadd <3 x float> %x, %src2
store <3 x float> %val, <3 x float>* %dst.addr store <3 x float> %val, <3 x float>* %dst.addr
ret void ret void
} }

2
test/CodeGen/X86/widen_shuffle-2.ll
View File

@@ -7,7 +7,7 @@
define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind { define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind {
entry: entry:
%x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 4, i32 2> %x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 4, i32 2>
%val = fadd <3 x float> %x, %src2; %val = fadd <3 x float> %x, %src2
store <3 x float> %val, <3 x float>* %dst.addr store <3 x float> %val, <3 x float>* %dst.addr
ret void ret void
} }

2
test/CodeGen/XCore/2009-03-27-v2f64-param.ll
View File

@@ -2,5 +2,5 @@
; PR3898 ; PR3898
define i32 @vector_param(<2 x double> %x) nounwind { define i32 @vector_param(<2 x double> %x) nounwind {
ret i32 1; ret i32 1
} }

2
test/CodeGen/XCore/private.ll
View File

@@ -12,7 +12,7 @@ define private void @foo() {
ret void ret void
} }
@baz = private global i32 4; @baz = private global i32 4
define i32 @bar() { define i32 @bar() {
call void @foo() call void @foo()

4
test/Integer/BitPacked.ll
View File

@@ -2,8 +2,8 @@
; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll ; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
; RUN: diff %t1.ll %t2.ll ; RUN: diff %t1.ll %t2.ll
@foo1 = external global <4 x float>; @foo1 = external global <4 x float>
@foo2 = external global <2 x i10>; @foo2 = external global <2 x i10>
define void @main() define void @main()

4
test/Integer/packed_bt.ll
View File

@@ -2,8 +2,8 @@
; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll ; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
; RUN: diff %t1.ll %t2.ll ; RUN: diff %t1.ll %t2.ll
@foo1 = external global <4 x float>; @foo1 = external global <4 x float>
@foo2 = external global <2 x i10>; @foo2 = external global <2 x i10>
define void @main() define void @main()

2
test/Integer/testvarargs_bt.ll
View File

@@ -7,7 +7,7 @@ declare i31 @"printf"(i8*, ...) ;; Prototype for: i32 __builtin_printf(const c
define i31 @"testvarar"() define i31 @"testvarar"()
begin begin
call i31(i8*, ...) *@printf(i8 * null, i31 12, i8 42); call i31(i8*, ...) *@printf(i8 * null, i31 12, i8 42)
ret i31 %1 ret i31 %1
end end

2
test/Other/2007-06-28-PassManager.ll
View File

@@ -3,5 +3,5 @@
; RUN: opt < %s -analyze -indvars -disable-output ; RUN: opt < %s -analyze -indvars -disable-output
; PR1539 ; PR1539
define i32 @test1() { define i32 @test1() {
ret i32 0; ret i32 0
} }

2
test/Other/2008-02-14-PassManager.ll
View File

@@ -1,5 +1,5 @@
; RUN: opt < %s -loop-unroll -loop-rotate -simplifycfg -disable-output ; RUN: opt < %s -loop-unroll -loop-rotate -simplifycfg -disable-output
; PR2028 ; PR2028
define i32 @test1() { define i32 @test1() {
ret i32 0; ret i32 0
} }

2
test/Other/2008-08-14-PassManager.ll
View File

@@ -1,5 +1,5 @@
; RUN: opt < %s -loop-deletion -loop-index-split -disable-output ; RUN: opt < %s -loop-deletion -loop-index-split -disable-output
; PR2640 ; PR2640
define i32 @test1() { define i32 @test1() {
ret i32 0; ret i32 0
} }

4
test/Transforms/DeadArgElim/canon.ll
View File

@@ -10,12 +10,12 @@ define internal {} @test() {
} }
define internal {i32} @test2() { define internal {i32} @test2() {
ret {i32} undef; ret {i32} undef
} }
define void @caller() { define void @caller() {
call {} @test() call {} @test()
%X = call {i32} @test2(); %X = call {i32} @test2()
%Y = extractvalue {i32} %X, 0 %Y = extractvalue {i32} %X, 0
call void @user(i32 %Y, {i32} %X) call void @user(i32 %Y, {i32} %X)
ret void ret void

2
test/Transforms/DeadStoreElimination/const-pointers.ll
View File

@@ -2,7 +2,7 @@
%t = type { i32 } %t = type { i32 }
@g = global i32 42; @g = global i32 42
define void @test1(%t* noalias %pp) { define void @test1(%t* noalias %pp) {
%p = getelementptr inbounds %t* %pp, i32 0, i32 0 %p = getelementptr inbounds %t* %pp, i32 0, i32 0

2
test/Transforms/DeadStoreElimination/no-targetdata.ll
View File

@@ -3,7 +3,7 @@
declare void @test1f() declare void @test1f()
define void @test1(i32* noalias %p) { define void @test1(i32* noalias %p) {
store i32 1, i32* %p; store i32 1, i32* %p
call void @test1f() call void @test1f()
store i32 2, i32 *%p store i32 2, i32 *%p
ret void ret void

2
test/Transforms/GVN/null-aliases-nothing.ll
View File

@@ -10,7 +10,7 @@ define void @test1(%t* noalias %stuff ) {
call void @test1f(i8* null) call void @test1f(i8* null)
%after = load i32* %p ; <--- This should be a dead load %after = load i32* %p ; <--- This should be a dead load
%sum = add i32 %before, %after; %sum = add i32 %before, %after
store i32 %sum, i32* %p store i32 %sum, i32* %p
ret void ret void

2
test/Transforms/GlobalOpt/ctor-list-opt-dbg.ll
View File

@@ -12,7 +12,7 @@
%llvm.dbg.anchor.type = type { i32, i32 } %llvm.dbg.anchor.type = type { i32, i32 }
%llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* } %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
@llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; @llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
@.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1] @.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
@.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1] @.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]

4
test/Transforms/IPConstantProp/return-argument.ll
View File

@@ -34,9 +34,9 @@ define void @caller(i1 %C) {
;; Call @foo twice, to prevent the arguments from propagating into the ;; Call @foo twice, to prevent the arguments from propagating into the
;; function (so we can check the returned argument is properly ;; function (so we can check the returned argument is properly
;; propagated per-caller). ;; propagated per-caller).
%S1 = call { i32, i32 } @foo(i32 1, i32 2); %S1 = call { i32, i32 } @foo(i32 1, i32 2)
%X1 = extractvalue { i32, i32 } %S1, 0 %X1 = extractvalue { i32, i32 } %S1, 0
%S2 = invoke { i32, i32 } @foo(i32 3, i32 4) to label %OK unwind label %RET; %S2 = invoke { i32, i32 } @foo(i32 3, i32 4) to label %OK unwind label %RET
OK: OK:
%X2 = extractvalue { i32, i32 } %S2, 0 %X2 = extractvalue { i32, i32 } %S2, 0
;; Do some stuff with the returned values which we can grep for ;; Do some stuff with the returned values which we can grep for

2
test/Transforms/Inline/2007-12-19-InlineNoUnwind.ll
View File

@@ -8,7 +8,7 @@ entry:
%n = call i1 @extern( ) %n = call i1 @extern( )
br i1 %n, label %r, label %u br i1 %n, label %r, label %u
r: r:
ret i32 0; ret i32 0
u: u:
unwind unwind
} }

4
test/Transforms/InstCombine/loadstore-alignment.ll
View File

@@ -29,7 +29,7 @@ define <2 x i64> @foo() {
define <2 x i64> @bar() { define <2 x i64> @bar() {
%t = alloca <2 x i64> %t = alloca <2 x i64>
call void @kip(<2 x i64>* %t); call void @kip(<2 x i64>* %t)
%tmp1 = load <2 x i64>* %t, align 1 %tmp1 = load <2 x i64>* %t, align 1
ret <2 x i64> %tmp1 ret <2 x i64> %tmp1
} }
@@ -59,7 +59,7 @@ define void @foo_store(<2 x i64> %y) {
define void @bar_store(<2 x i64> %y) { define void @bar_store(<2 x i64> %y) {
%t = alloca <2 x i64> %t = alloca <2 x i64>
call void @kip(<2 x i64>* %t); call void @kip(<2 x i64>* %t)
store <2 x i64> %y, <2 x i64>* %t, align 1 store <2 x i64> %y, <2 x i64>* %t, align 1
ret void ret void
} }

2
test/Transforms/LoopIndexSplit/SplitValue-2007-08-24-dbg.ll
View File

@@ -5,7 +5,7 @@
%llvm.dbg.anchor.type = type { i32, i32 } %llvm.dbg.anchor.type = type { i32, i32 }
%llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* } %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
@llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; @llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
@.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1] @.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
@.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1] @.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]

2
test/Transforms/LoopRotate/PhiRename-1.ll
View File

@@ -73,7 +73,7 @@ cond_next: ; preds = %cond_true, %bb
br label %bb21 br label %bb21
bb21: ; preds = %cond_next, %entry bb21: ; preds = %cond_next, %entry
%l.in = phi %struct.list** [ @operators, %entry ], [ %tmp19, %cond_next ] ; %l.in = phi %struct.list** [ @operators, %entry ], [ %tmp19, %cond_next ]
%tmp22 = load %struct.list** %l.in ; <%struct.list*> [#uses=1] %tmp22 = load %struct.list** %l.in ; <%struct.list*> [#uses=1]
icmp ne %struct.list* %tmp22, null ; <i1>:3 [#uses=1] icmp ne %struct.list* %tmp22, null ; <i1>:3 [#uses=1]
zext i1 %3 to i8 ; <i8>:4 [#uses=1] zext i1 %3 to i8 ; <i8>:4 [#uses=1]

2
test/Transforms/PruneEH/simplenoreturntest.ll
View File

@@ -1,6 +1,6 @@
; RUN: opt < %s -prune-eh -S | not grep {ret i32} ; RUN: opt < %s -prune-eh -S | not grep {ret i32}
declare void @noreturn() noreturn; declare void @noreturn() noreturn
define i32 @caller() { define i32 @caller() {
call void @noreturn( ) call void @noreturn( )

2
test/Transforms/ScalarRepl/2009-01-09-scalarrepl-empty.ll
View File

@@ -8,7 +8,7 @@
define void @_ada_c37304a() { define void @_ada_c37304a() {
entry: entry:
%v = alloca %struct.c37304a__vrec ; %v = alloca %struct.c37304a__vrec
%0 = getelementptr %struct.c37304a__vrec* %v, i32 0, i32 0 %0 = getelementptr %struct.c37304a__vrec* %v, i32 0, i32 0
store i8 8, i8* %0, align 1 store i8 8, i8* %0, align 1
unreachable unreachable

2
test/Transforms/SimplifyCFG/2003-08-17-FoldSwitch-dbg.ll
View File

@@ -5,7 +5,7 @@
%llvm.dbg.anchor.type = type { i32, i32 } %llvm.dbg.anchor.type = type { i32, i32 }
%llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* } %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
@llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; @llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
@.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1] @.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
@.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1] @.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]

2
test/Transforms/SimplifyCFG/2009-03-05-Speculative-Hoist-Dbg.ll
View File

@@ -2,7 +2,7 @@
%llvm.dbg.anchor.type = type { i32, i32 } %llvm.dbg.anchor.type = type { i32, i32 }
%llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* } %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
@llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; @llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
@.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1] @.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
@.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1] @.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]

2
test/Transforms/SimplifyCFG/branch_fold_dbg.ll
View File

@@ -4,7 +4,7 @@
%llvm.dbg.anchor.type = type { i32, i32 } %llvm.dbg.anchor.type = type { i32, i32 }
%llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* } %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
@llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; @llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
@.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1] @.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
@.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1] @.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]

2
test/Transforms/SimplifyCFG/hoist-common-code.dbg.ll
View File

@@ -4,7 +4,7 @@
%llvm.dbg.anchor.type = type { i32, i32 } %llvm.dbg.anchor.type = type { i32, i32 }
%llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* } %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
@llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; @llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
@.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1] @.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
@.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1] @.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]

2
test/Transforms/SimplifyCFG/switch_formation.dbg.ll
View File

@@ -4,7 +4,7 @@
%llvm.dbg.anchor.type = type { i32, i32 } %llvm.dbg.anchor.type = type { i32, i32 }
%llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* } %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
@llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; @llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
@.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1] @.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
@.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1] @.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]

2
test/Transforms/SimplifyCFG/two-entry-phi-return.dbg.ll
View File

@@ -3,7 +3,7 @@
%llvm.dbg.anchor.type = type { i32, i32 } %llvm.dbg.anchor.type = type { i32, i32 }
%llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* } %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
@llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; @llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata"
@.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1] @.str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata" ; <[4 x i8]*> [#uses=1]
@.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1] @.str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata" ; <[6 x i8]*> [#uses=1]

6
test/Transforms/TailCallElim/dont_reorder_load.ll
View File

@@ -34,8 +34,8 @@ entry:
br i1 %tmp2, label %if, label %else br i1 %tmp2, label %if, label %else
if: ; preds = %entry if: ; preds = %entry
store i32 1, i32* %a_arg; store i32 1, i32* %a_arg
ret i32 0; ret i32 0
else: ; preds = %entry else: ; preds = %entry
%tmp7 = add i32 %start_arg, 1 ; <i32> [#uses=1] %tmp7 = add i32 %start_arg, 1 ; <i32> [#uses=1]
@@ -53,7 +53,7 @@ entry:
br i1 %tmp2, label %if, label %else br i1 %tmp2, label %if, label %else
if: ; preds = %entry if: ; preds = %entry
ret i32 0; ret i32 0
else: ; preds = %entry else: ; preds = %entry
%tmp7 = add i32 %start_arg, 1 ; <i32> [#uses=1] %tmp7 = add i32 %start_arg, 1 ; <i32> [#uses=1]

2
test/Verifier/2006-10-15-AddrLabel.ll
View File

@@ -4,5 +4,5 @@ define i32 @main() {
%foo = call i8* %llvm.stacksave() %foo = call i8* %llvm.stacksave()
%foop = bitcast i8* %foo to label* %foop = bitcast i8* %foo to label*
%nret = load label* %foop %nret = load label* %foop
br label %nret; br label %nret
} }