6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-12-20 03:17:48 +00:00
Code Issues Projects Releases Wiki Activity

Don't try to pull vector bitcasts that change the number of elements through

Browse Source 
a select. A vector select is pairwise on each element so we'd need a new
condition with the right number of elements to select on. Fixes PR8994.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123963 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nick Lewycky
2011-01-21 02:30:43 +00:00
parent 7acdb4d237
commit acf4a7c0e6
2 changed files with 28 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
lib/Transforms/InstCombine/InstructionCombining.cpp
View File

@@ -455,8 +455,9 @@ Value *InstCombiner::dyn_castFNegVal(Value *V) const {
static Value *FoldOperationIntoSelectOperand(Instruction &I, Value *SO, static Value *FoldOperationIntoSelectOperand(Instruction &I, Value *SO,
InstCombiner *IC) { InstCombiner *IC) {
if (CastInst *CI = dyn_cast<CastInst>(&I)) if (CastInst *CI = dyn_cast<CastInst>(&I)) {
return IC->Builder->CreateCast(CI->getOpcode(), SO, I.getType()); return IC->Builder->CreateCast(CI->getOpcode(), SO, I.getType());
}
// Figure out if the constant is the left or the right argument. // Figure out if the constant is the left or the right argument.
bool ConstIsRHS = isa<Constant>(I.getOperand(1)); bool ConstIsRHS = isa<Constant>(I.getOperand(1));
@@ -498,11 +499,24 @@ Instruction *InstCombiner::FoldOpIntoSelect(Instruction &Op, SelectInst *SI) {
// Bool selects with constant operands can be folded to logical ops. // Bool selects with constant operands can be folded to logical ops.
if (SI->getType()->isIntegerTy(1)) return 0; if (SI->getType()->isIntegerTy(1)) return 0;
// If it's a bitcast involving vectors, make sure it has the same number of
// elements on both sides.
if (BitCastInst *BC = dyn_cast<BitCastInst>(&Op)) {
const VectorType *DestTy = dyn_cast<VectorType>(BC->getDestTy());
const VectorType *SrcTy = dyn_cast<VectorType>(BC->getSrcTy());
// Verify that either both or neither are vectors.
if ((SrcTy == NULL) != (DestTy == NULL)) return 0;
// If vectors, verify that they have the same number of elements.
if (SrcTy && SrcTy->getNumElements() != DestTy->getNumElements())
return 0;
}
Value *SelectTrueVal = FoldOperationIntoSelectOperand(Op, TV, this); Value *SelectTrueVal = FoldOperationIntoSelectOperand(Op, TV, this);
Value *SelectFalseVal = FoldOperationIntoSelectOperand(Op, FV, this); Value *SelectFalseVal = FoldOperationIntoSelectOperand(Op, FV, this);
return SelectInst::Create(SI->getCondition(), SelectTrueVal, return SelectInst::Create(SI->getCondition(),
SelectFalseVal); SelectTrueVal, SelectFalseVal);
} }
return 0; return 0;
} }

11
test/Transforms/InstCombine/select.ll
View File

@@ -689,3 +689,14 @@ define i64 @test50(i32 %a) nounwind {
; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2 ; CHECK-NEXT: %min = select i1 %is_a_nonpositive, i64 %a_ext, i64 2
; CHECK-NEXT: ret i64 %min ; CHECK-NEXT: ret i64 %min
} }
; PR8994
; Theis select instruction can't be eliminated because trying to do so would
; change the number of vector elements. This used to assert.
define i48 @test51(<3 x i1> %icmp, <3 x i16> %tmp) {
%select = select <3 x i1> %icmp, <3 x i16> zeroinitializer, <3 x i16> %tmp
; CHECK: select <3 x i1>
%tmp2 = bitcast <3 x i16> %select to i48
ret i48 %tmp2
}