Allow these transforms for types like i256 while

still excluding types like i1 (not byte sized)
and i120 (loading an i120 requires loading an i64,
an i32, an i16 and an i8, which is expensive). 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52310 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands 2008-06-16 08:14:38 +00:00
parent 7a15391c8d
commit ad205a7687
2 changed files with 12 additions and 8 deletions

View File

@ -266,6 +266,12 @@ namespace llvm {
return (getSizeInBits() & 7) == 0; return (getSizeInBits() & 7) == 0;
} }
/// isRound - Return true if the size is a power-of-two number of bytes.
inline bool isRound() const {
unsigned BitSize = getSizeInBits();
return BitSize >= 8 && !(BitSize & (BitSize - 1));
}
/// bitsGT - Return true if this has more bits than VT. /// bitsGT - Return true if this has more bits than VT.
inline bool bitsGT(MVT VT) const { inline bool bitsGT(MVT VT) const {
return getSizeInBits() > VT.getSizeInBits(); return getSizeInBits() > VT.getSizeInBits();

View File

@ -1787,10 +1787,9 @@ SDOperand DAGCombiner::visitAND(SDNode *N) {
EVT = MVT::getIntegerVT(ActiveBits); EVT = MVT::getIntegerVT(ActiveBits);
MVT LoadedVT = LN0->getMemoryVT(); MVT LoadedVT = LN0->getMemoryVT();
// Do not generate loads of extended integer types since these can be // Do not generate loads of non-round integer types since these can
// expensive (and would be wrong if the type is not byte sized). // be expensive (and would be wrong if the type is not byte sized).
if (EVT != MVT::Other && LoadedVT.bitsGT(EVT) && EVT.isSimple() && if (EVT != MVT::Other && LoadedVT.bitsGT(EVT) && EVT.isRound() &&
EVT.isByteSized() && // Exclude MVT::i1, which is simple.
(!AfterLegalize || TLI.isLoadXLegal(ISD::ZEXTLOAD, EVT))) { (!AfterLegalize || TLI.isLoadXLegal(ISD::ZEXTLOAD, EVT))) {
MVT PtrType = N0.getOperand(1).getValueType(); MVT PtrType = N0.getOperand(1).getValueType();
// For big endian targets, we need to add an offset to the pointer to // For big endian targets, we need to add an offset to the pointer to
@ -3187,10 +3186,9 @@ SDOperand DAGCombiner::ReduceLoadWidth(SDNode *N) {
} }
} }
// Do not generate loads of extended integer types since these can be // Do not generate loads of non-round integer types since these can
// expensive (and would be wrong if the type is not byte sized). // be expensive (and would be wrong if the type is not byte sized).
if (ISD::isNON_EXTLoad(N0.Val) && N0.hasOneUse() && VT.isSimple() && if (ISD::isNON_EXTLoad(N0.Val) && N0.hasOneUse() && VT.isRound() &&
VT.isByteSized() && // Exclude MVT::i1, which is simple.
// Do not change the width of a volatile load. // Do not change the width of a volatile load.
!cast<LoadSDNode>(N0)->isVolatile()) { !cast<LoadSDNode>(N0)->isVolatile()) {
assert(N0.getValueType().getSizeInBits() > EVTBits && assert(N0.getValueType().getSizeInBits() > EVTBits &&