mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-11-02 07:17:36 +00:00
[X86][MC] Intel syntax: accept implicit memory operand sizes larger than 80.
The X86AsmParser intel handling was refactored in r216481, making it
try each different memory operand size to see which one matches.
Operand sizes larger than 80 ("[xyz]mmword ptr") were forgotten, which
led to an "invalid operand" error for code such as:
movdqa [rax], xmm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223187 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -2626,7 +2626,7 @@ bool X86AsmParser::MatchAndEmitIntelInstruction(SMLoc IDLoc, unsigned &Opcode,
|
||||
SmallVector<unsigned, 8> Match;
|
||||
uint64_t ErrorInfoMissingFeature = 0;
|
||||
if (UnsizedMemOp && UnsizedMemOp->isMemUnsized()) {
|
||||
static const unsigned MopSizes[] = {8, 16, 32, 64, 80};
|
||||
static const unsigned MopSizes[] = {8, 16, 32, 64, 80, 128, 256, 512};
|
||||
for (unsigned Size : MopSizes) {
|
||||
UnsizedMemOp->Mem.Size = Size;
|
||||
uint64_t ErrorInfoIgnore;
|
||||
|
||||
Reference in New Issue
Block a user