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Added STRHT for disassembly only and fixed a bug in AI3sthpo class where the W

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bit should be set to 0 instead of 1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97481 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Johnny Chen
2010-03-01 19:22:00 +00:00
parent 39ca4ea01a
commit ad4df4c0da
2 changed files with 10 additions and 2 deletions
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2
lib/Target/ARM/ARMInstrFormats.td
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@@ -815,7 +815,7 @@ class AI3sthpo<dag oops, dag iops, Format f, InstrItinClass itin,
let Inst{6} = 0; // S bit let Inst{6} = 0; // S bit
let Inst{7} = 1; let Inst{7} = 1;
let Inst{20} = 0; // L bit let Inst{20} = 0; // L bit
let Inst{21} = 1; // W bit let Inst{21} = 0; // W bit
let Inst{24} = 0; // P bit let Inst{24} = 0; // P bit
let Inst{27-25} = 0b000; let Inst{27-25} = 0b000;
} }

10
lib/Target/ARM/ARMInstrInfo.td
View File

@@ -1260,7 +1260,7 @@ def STRD_POST: AI3stdpo<(outs GPR:$base_wb),
"strd", "\t$src1, $src2, [$base], $offset", "strd", "\t$src1, $src2, [$base], $offset",
"$base = $base_wb", []>; "$base = $base_wb", []>;
// STRT and STRBT are for disassembly only. // STRT, STRBT, and STRHT are for disassembly only.
def STRT : AI2stwpo<(outs GPR:$base_wb), def STRT : AI2stwpo<(outs GPR:$base_wb),
(ins GPR:$src, GPR:$base,am2offset:$offset), (ins GPR:$src, GPR:$base,am2offset:$offset),
@@ -1278,6 +1278,14 @@ def STRBT : AI2stbpo<(outs GPR:$base_wb),
let Inst{21} = 1; // overwrite let Inst{21} = 1; // overwrite
} }
def STRHT: AI3sthpo<(outs GPR:$base_wb),
(ins GPR:$src, GPR:$base,am3offset:$offset),
StMiscFrm, IIC_iStoreru,
"strht", "\t$src, [$base], $offset", "$base = $base_wb",
[/* For disassembly only; pattern left blank */]> {
let Inst{21} = 1; // overwrite
}
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Load / store multiple Instructions. // Load / store multiple Instructions.
// //