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Set isBarrier = 1 on return instructions, as they are control barriers.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86851 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2009-11-11 18:11:07 +00:00
parent e94975ee64
commit adaace8aa8
5 changed files with 5 additions and 4 deletions
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2
lib/Target/Alpha/AlphaInstrInfo.td
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@ -391,7 +391,7 @@ def : Pat<(setune GPRC:$X, GPRC:$Y), (CMPEQi (CMPEQ GPRC:$X, GPRC:$Y), 0)>;
def : Pat<(setune GPRC:$X, immUExt8:$Y), (CMPEQi (CMPEQ GPRC:$X, immUExt8:$Y), 0)>; def : Pat<(setune GPRC:$X, immUExt8:$Y), (CMPEQi (CMPEQ GPRC:$X, immUExt8:$Y), 0)>;
let isReturn = 1, isTerminator = 1, Ra = 31, Rb = 26, disp = 1, Uses = [R26] in { let isReturn = 1, isTerminator = 1, isBarrier = 1, Ra = 31, Rb = 26, disp = 1, Uses = [R26] in {
def RETDAG : MbrForm< 0x1A, 0x02, (ops), "ret $$31,($$26),1", s_jsr>; //Return from subroutine def RETDAG : MbrForm< 0x1A, 0x02, (ops), "ret $$31,($$26),1", s_jsr>; //Return from subroutine
def RETDAGp : MbrpForm< 0x1A, 0x02, (ops), "ret $$31,($$26),1", [(retflag)], s_jsr>; //Return from subroutine def RETDAGp : MbrpForm< 0x1A, 0x02, (ops), "ret $$31,($$26),1", [(retflag)], s_jsr>; //Return from subroutine
} }

1
lib/Target/Blackfin/BlackfinInstrInfo.td
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@ -174,6 +174,7 @@ def CALLp: F1<(outs), (ins P:$func, variable_ops),
let isReturn = 1, let isReturn = 1,
isTerminator = 1, isTerminator = 1,
isBarrier = 1,
Uses = [RETS] in Uses = [RETS] in
def RTS: F1<(outs), (ins), "rts;", [(BfinRet)]>; def RTS: F1<(outs), (ins), "rts;", [(BfinRet)]>;

2
lib/Target/MSP430/MSP430InstrInfo.td
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@ -127,7 +127,7 @@ def NOP : Pseudo<(outs), (ins), "nop", []>;
// //
// FIXME: Provide proper encoding! // FIXME: Provide proper encoding!
let isReturn = 1, isTerminator = 1 in { let isReturn = 1, isTerminator = 1, isBarrier = 1 in {
def RET : Pseudo<(outs), (ins), "ret", [(MSP430retflag)]>; def RET : Pseudo<(outs), (ins), "ret", [(MSP430retflag)]>;
} }

2
lib/Target/Sparc/SparcInstrInfo.td
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@ -277,7 +277,7 @@ let usesCustomInserter = 1 in { // Expanded after instruction selection.
// Section A.3 - Synthetic Instructions, p. 85 // Section A.3 - Synthetic Instructions, p. 85
// special cases of JMPL: // special cases of JMPL:
let isReturn = 1, isTerminator = 1, hasDelaySlot = 1 in { let isReturn = 1, isTerminator = 1, hasDelaySlot = 1, isBarrier = 1 in {
let rd = O7.Num, rs1 = G0.Num, simm13 = 8 in let rd = O7.Num, rs1 = G0.Num, simm13 = 8 in
def RETL: F3_2<2, 0b111000, (outs), (ins), "retl", [(retflag)]>; def RETL: F3_2<2, 0b111000, (outs), (ins), "retl", [(retflag)]>;
} }

2
lib/Target/XCore/XCoreInstrInfo.td
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@ -617,7 +617,7 @@ defm EXTSP : FU6_LU6_np<"extsp">;
let mayStore = 1 in let mayStore = 1 in
defm ENTSP : FU6_LU6_np<"entsp">; defm ENTSP : FU6_LU6_np<"entsp">;
let isReturn = 1, isTerminator = 1, mayLoad = 1 in { let isReturn = 1, isTerminator = 1, mayLoad = 1, isBarrier = 1 in {
defm RETSP : FU6_LU6<"retsp", XCoreRetsp>; defm RETSP : FU6_LU6<"retsp", XCoreRetsp>;
} }
} }