mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-02-08 06:32:24 +00:00
First steps in in X86 calling convention cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45536 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Gordon Henriksen
parent
7cc5facfe5
commit
ae636f8e99
@ -938,9 +938,6 @@ static unsigned AddLiveIn(MachineFunction &MF, unsigned PReg,
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return VReg;
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}
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// align stack arguments according to platform alignment needed for tail calls
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unsigned GetAlignedArgumentStackSize(unsigned StackSize, SelectionDAG& DAG);
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SDOperand X86TargetLowering::LowerMemArgument(SDOperand Op, SelectionDAG &DAG,
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const CCValAssign &VA,
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MachineFrameInfo *MFI,
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@ -960,16 +957,18 @@ SDOperand X86TargetLowering::LowerMemArgument(SDOperand Op, SelectionDAG &DAG,
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SDOperand X86TargetLowering::LowerCCCArguments(SDOperand Op, SelectionDAG &DAG,
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bool isStdCall) {
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unsigned NumArgs = Op.Val->getNumValues() - 1;
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MachineFunction &MF = DAG.getMachineFunction();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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SDOperand Root = Op.getOperand(0);
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bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
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unsigned CC = MF.getFunction()->getCallingConv();
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assert(!(isVarArg && CC == CallingConv::Fast) &&
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"Var args not supported with calling convention fastcc");
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// Assign locations to all of the incoming arguments.
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SmallVector<CCValAssign, 16> ArgLocs;
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CCState CCInfo(CC, isVarArg,
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getTargetMachine(), ArgLocs);
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CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs);
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// Check for possible tail call calling convention.
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if (CC == CallingConv::Fast && PerformTailCallOpt)
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CCInfo.AnalyzeFormalArguments(Op.Val, CC_X86_32_TailCall);
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@ -1021,28 +1020,27 @@ SDOperand X86TargetLowering::LowerCCCArguments(SDOperand Op, SelectionDAG &DAG,
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unsigned StackSize = CCInfo.getNextStackOffset();
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// align stack specially for tail calls
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if (CC==CallingConv::Fast)
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StackSize = GetAlignedArgumentStackSize(StackSize,DAG);
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ArgValues.push_back(Root);
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if (CC == CallingConv::Fast)
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StackSize = GetAlignedArgumentStackSize(StackSize, DAG);
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// If the function takes variable number of arguments, make a frame index for
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// the start of the first vararg value... for expansion of llvm.va_start.
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if (isVarArg)
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if (isVarArg) {
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VarArgsFrameIndex = MFI->CreateFixedObject(1, StackSize);
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}
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// Tail call calling convention (CallingConv::Fast) does not support varargs.
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assert( !(isVarArg && CC == CallingConv::Fast) &&
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"CallingConv::Fast does not support varargs.");
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ArgValues.push_back(Root);
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// Tail call convention (fastcc) needs callee pop.
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if (isStdCall && !isVarArg &&
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(CC==CallingConv::Fast && PerformTailCallOpt || CC!=CallingConv::Fast)) {
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BytesToPopOnReturn = StackSize; // Callee pops everything..
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BytesToPopOnReturn = StackSize; // Callee pops everything..
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BytesCallerReserves = 0;
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} else {
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BytesToPopOnReturn = 0; // Callee pops nothing.
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// If this is an sret function, the return should pop the hidden pointer.
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unsigned NumArgs = Op.Val->getNumValues() - 1;
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if (NumArgs &&
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(cast<ConstantSDNode>(Op.getOperand(3))->getValue() &
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ISD::ParamFlags::StructReturn))
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@ -1051,7 +1049,7 @@ SDOperand X86TargetLowering::LowerCCCArguments(SDOperand Op, SelectionDAG &DAG,
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BytesCallerReserves = StackSize;
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}
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RegSaveFrameIndex = 0xAAAAAAA; // X86-64 only.
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RegSaveFrameIndex = 0xAAAAAAA; // X86-64 only.
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X86MachineFunctionInfo *FuncInfo = MF.getInfo<X86MachineFunctionInfo>();
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FuncInfo->setBytesToPopOnReturn(BytesToPopOnReturn);
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@ -1061,24 +1059,27 @@ SDOperand X86TargetLowering::LowerCCCArguments(SDOperand Op, SelectionDAG &DAG,
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&ArgValues[0], ArgValues.size()).getValue(Op.ResNo);
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}
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SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG,
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unsigned CC) {
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SDOperand
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X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG,
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unsigned CC) {
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SDOperand Chain = Op.getOperand(0);
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bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
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SDOperand Callee = Op.getOperand(4);
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unsigned NumOps = (Op.getNumOperands() - 5) / 2;
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assert(!(isVarArg && CC == CallingConv::Fast) &&
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"Var args not supported with calling convention fastcc");
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// Analyze operands of the call, assigning locations to each operand.
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SmallVector<CCValAssign, 16> ArgLocs;
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CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs);
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if(CC==CallingConv::Fast && PerformTailCallOpt)
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if (CC==CallingConv::Fast && PerformTailCallOpt)
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CCInfo.AnalyzeCallOperands(Op.Val, CC_X86_32_TailCall);
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else
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CCInfo.AnalyzeCallOperands(Op.Val, CC_X86_32_C);
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// Get a count of how many bytes are to be pushed on the stack.
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unsigned NumBytes = CCInfo.getNextStackOffset();
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if (CC==CallingConv::Fast)
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if (CC == CallingConv::Fast)
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NumBytes = GetAlignedArgumentStackSize(NumBytes, DAG);
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Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, getPointerTy()));
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@ -1121,6 +1122,7 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG,
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}
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// If the first argument is an sret pointer, remember it.
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unsigned NumOps = (Op.getNumOperands() - 5) / 2;
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bool isSRet = NumOps &&
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(cast<ConstantSDNode>(Op.getOperand(6))->getValue() &
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ISD::ParamFlags::StructReturn);
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@ -1156,8 +1158,9 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG,
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if (!Subtarget->GVRequiresExtraLoad(G->getGlobal(),
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getTargetMachine(), true))
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Callee = DAG.getTargetGlobalAddress(G->getGlobal(), getPointerTy());
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} else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee))
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} else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) {
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Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy());
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}
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// Returns a chain & a flag for retval copy to use.
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SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag);
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@ -1184,22 +1187,19 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG,
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// Create the CALLSEQ_END node.
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unsigned NumBytesForCalleeToPush = 0;
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if (CC == CallingConv::X86_StdCall ||
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(CC == CallingConv::Fast && PerformTailCallOpt)) {
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if (isVarArg)
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NumBytesForCalleeToPush = isSRet ? 4 : 0;
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else
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NumBytesForCalleeToPush = NumBytes;
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assert(!(isVarArg && CC==CallingConv::Fast) &&
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"CallingConv::Fast does not support varargs.");
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} else {
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if (!isVarArg && (CC == CallingConv::X86_StdCall
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|| CC == CallingConv::Fast && PerformTailCallOpt)) {
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NumBytesForCalleeToPush = NumBytes; // Callee pops everything
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} else if (isSRet) {
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// If this is is a call to a struct-return function, the callee
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// pops the hidden struct pointer, so we have to push it back.
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// This is common for Darwin/X86, Linux & Mingw32 targets.
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NumBytesForCalleeToPush = isSRet ? 4 : 0;
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NumBytesForCalleeToPush = 4;
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} else {
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NumBytesForCalleeToPush = 0; // Callee pops nothing.
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}
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// Returns a flag for retval copy to use.
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Chain = DAG.getCALLSEQ_END(Chain,
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DAG.getConstant(NumBytes, getPointerTy()),
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DAG.getConstant(NumBytesForCalleeToPush,
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@ -1225,17 +1225,21 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG,
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// This calling convention always arranges for the callee pop value to be 8n+4
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// bytes, which is needed for tail recursion elimination and stack alignment
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// reasons.
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SDOperand
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X86TargetLowering::LowerFastCCArguments(SDOperand Op, SelectionDAG &DAG) {
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MachineFunction &MF = DAG.getMachineFunction();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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SDOperand Root = Op.getOperand(0);
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bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
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unsigned CC = MF.getFunction()->getCallingConv();
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assert(!(isVarArg && CC == CallingConv::Fast) &&
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"Var args not supported with calling convention fastcc");
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// Assign locations to all of the incoming arguments.
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SmallVector<CCValAssign, 16> ArgLocs;
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CCState CCInfo(MF.getFunction()->getCallingConv(), isVarArg,
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getTargetMachine(), ArgLocs);
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CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs);
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CCInfo.AnalyzeFormalArguments(Op.Val, CC_X86_32_FastCall);
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SmallVector<SDOperand, 8> ArgValues;
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@ -1281,8 +1285,6 @@ X86TargetLowering::LowerFastCCArguments(SDOperand Op, SelectionDAG &DAG) {
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}
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}
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ArgValues.push_back(Root);
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unsigned StackSize = CCInfo.getNextStackOffset();
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if (!Subtarget->isTargetCygMing() && !Subtarget->isTargetWindows()) {
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@ -1293,8 +1295,10 @@ X86TargetLowering::LowerFastCCArguments(SDOperand Op, SelectionDAG &DAG) {
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StackSize += 4;
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}
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VarArgsFrameIndex = 0xAAAAAAA; // fastcc functions can't have varargs.
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ArgValues.push_back(Root);
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RegSaveFrameIndex = 0xAAAAAAA; // X86-64 only.
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VarArgsFrameIndex = 0xAAAAAAA; // fastcc functions can't have varargs.
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BytesToPopOnReturn = StackSize; // Callee pops all stack arguments.
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BytesCallerReserves = 0;
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@ -1334,13 +1338,16 @@ X86TargetLowering::LowerMemOpCallTo(SDOperand Op, SelectionDAG &DAG,
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}
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}
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SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
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unsigned CC) {
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SDOperand
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X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
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unsigned CC) {
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SDOperand Chain = Op.getOperand(0);
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bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0;
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bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
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SDOperand Callee = Op.getOperand(4);
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assert(!cast<ConstantSDNode>(Op.getOperand(3))->getValue() &&
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"Tail calls should not reach here.");
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// Analyze operands of the call, assigning locations to each operand.
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SmallVector<CCValAssign, 16> ArgLocs;
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CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs);
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@ -1348,7 +1355,6 @@ SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
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// Get a count of how many bytes are to be pushed on the stack.
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unsigned NumBytes = CCInfo.getNextStackOffset();
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if (!Subtarget->isTargetCygMing() && !Subtarget->isTargetWindows()) {
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// Make sure the instruction takes 8n+4 bytes to make sure the start of the
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// arguments and the arguments after the retaddr has been pushed are
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@ -1371,17 +1377,17 @@ SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
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// Promote the value if needed.
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switch (VA.getLocInfo()) {
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default: assert(0 && "Unknown loc info!");
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case CCValAssign::Full: break;
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case CCValAssign::SExt:
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Arg = DAG.getNode(ISD::SIGN_EXTEND, VA.getLocVT(), Arg);
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break;
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case CCValAssign::ZExt:
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Arg = DAG.getNode(ISD::ZERO_EXTEND, VA.getLocVT(), Arg);
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break;
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case CCValAssign::AExt:
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Arg = DAG.getNode(ISD::ANY_EXTEND, VA.getLocVT(), Arg);
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break;
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default: assert(0 && "Unknown loc info!");
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case CCValAssign::Full: break;
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case CCValAssign::SExt:
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Arg = DAG.getNode(ISD::SIGN_EXTEND, VA.getLocVT(), Arg);
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break;
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case CCValAssign::ZExt:
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Arg = DAG.getNode(ISD::ZERO_EXTEND, VA.getLocVT(), Arg);
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break;
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case CCValAssign::AExt:
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Arg = DAG.getNode(ISD::ANY_EXTEND, VA.getLocVT(), Arg);
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break;
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}
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if (VA.isRegLoc()) {
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@ -1417,8 +1423,9 @@ SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
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if (!Subtarget->GVRequiresExtraLoad(G->getGlobal(),
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getTargetMachine(), true))
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Callee = DAG.getTargetGlobalAddress(G->getGlobal(), getPointerTy());
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} else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee))
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} else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) {
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Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy());
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}
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// ELF / PIC requires GOT in the EBX register before function calls via PLT
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// GOT pointer.
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@ -1450,19 +1457,18 @@ SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
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if (InFlag.Val)
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Ops.push_back(InFlag);
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assert(isTailCall==false && "no tail call here");
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Chain = DAG.getNode(X86ISD::CALL,
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NodeTys, &Ops[0], Ops.size());
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Chain = DAG.getNode(X86ISD::CALL, NodeTys, &Ops[0], Ops.size());
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InFlag = Chain.getValue(1);
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// Create the CALLSEQ_END node.
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unsigned NumBytesForCalleeToPush = NumBytes;
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// Returns a flag for retval copy to use.
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NodeTys = DAG.getVTList(MVT::Other, MVT::Flag);
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Ops.clear();
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Ops.push_back(Chain);
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Ops.push_back(DAG.getConstant(NumBytes, getPointerTy()));
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Ops.push_back(DAG.getConstant(NumBytes, getPointerTy()));
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Ops.push_back(InFlag);
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Chain = DAG.getNode(ISD::CALLSEQ_END, NodeTys, &Ops[0], Ops.size());
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Chain = DAG.getCALLSEQ_END(Chain,
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DAG.getConstant(NumBytes, getPointerTy()),
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DAG.getConstant(NumBytesForCalleeToPush,
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getPointerTy()),
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InFlag);
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InFlag = Chain.getValue(1);
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// Handle result values, copying them out of physregs into vregs that we
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@ -1569,16 +1575,16 @@ bool X86TargetLowering::IsEligibleForTailCallOptimization(SDOperand Call,
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return false;
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}
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SDOperand X86TargetLowering::LowerX86_TailCallTo(SDOperand Op,
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SelectionDAG &DAG,
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unsigned CC) {
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SDOperand
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X86TargetLowering::LowerX86_TailCallTo(SDOperand Op, SelectionDAG &DAG,
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unsigned CC) {
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SDOperand Chain = Op.getOperand(0);
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bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
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bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0;
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SDOperand Callee = Op.getOperand(4);
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bool is64Bit = Subtarget->is64Bit();
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assert(isTailCall && PerformTailCallOpt && "Should only emit tail calls.");
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assert(cast<ConstantSDNode>(Op.getOperand(3))->getValue() &&PerformTailCallOpt
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&& "Should only emit tail calls.");
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// Analyze operands of the call, assigning locations to each operand.
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SmallVector<CCValAssign, 16> ArgLocs;
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@ -1588,7 +1594,6 @@ SDOperand X86TargetLowering::LowerX86_TailCallTo(SDOperand Op,
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else
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CCInfo.AnalyzeCallOperands(Op.Val, CC_X86_32_TailCall);
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// Lower arguments at fp - stackoffset + fpdiff.
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MachineFunction &MF = DAG.getMachineFunction();
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@ -1799,7 +1804,10 @@ X86TargetLowering::LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG) {
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MachineFrameInfo *MFI = MF.getFrameInfo();
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SDOperand Root = Op.getOperand(0);
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bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
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unsigned CC= MF.getFunction()->getCallingConv();
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unsigned CC = MF.getFunction()->getCallingConv();
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assert(!(isVarArg && CC == CallingConv::Fast) &&
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"Var args not supported with calling convention fastcc");
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static const unsigned GPR64ArgRegs[] = {
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X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9
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@ -1809,11 +1817,10 @@ X86TargetLowering::LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG) {
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X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
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};
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// Assign locations to all of the incoming arguments.
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SmallVector<CCValAssign, 16> ArgLocs;
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CCState CCInfo(CC, isVarArg,
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getTargetMachine(), ArgLocs);
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CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs);
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// Check for possible tail call calling convention.
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if (CC == CallingConv::Fast && PerformTailCallOpt)
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CCInfo.AnalyzeFormalArguments(Op.Val, CC_X86_64_TailCall);
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else
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@ -1878,14 +1885,13 @@ X86TargetLowering::LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG) {
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}
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unsigned StackSize = CCInfo.getNextStackOffset();
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if (CC==CallingConv::Fast)
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StackSize =GetAlignedArgumentStackSize(StackSize, DAG);
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// align stack specially for tail calls
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if (CC == CallingConv::Fast)
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StackSize = GetAlignedArgumentStackSize(StackSize, DAG);
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// If the function takes variable number of arguments, make a frame index for
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// the start of the first vararg value... for expansion of llvm.va_start.
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if (isVarArg) {
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assert(CC!=CallingConv::Fast
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&& "Var arg not supported with calling convention fastcc");
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unsigned NumIntRegs = CCInfo.getFirstUnallocated(GPR64ArgRegs, 6);
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unsigned NumXMMRegs = CCInfo.getFirstUnallocated(XMMArgRegs, 8);
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@ -1930,12 +1936,13 @@ X86TargetLowering::LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG) {
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}
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ArgValues.push_back(Root);
|
||||
|
||||
// Tail call convention (fastcc) needs callee pop.
|
||||
if (CC == CallingConv::Fast && PerformTailCallOpt) {
|
||||
BytesToPopOnReturn = StackSize; // Callee pops everything.
|
||||
BytesToPopOnReturn = StackSize; // Callee pops everything.
|
||||
BytesCallerReserves = 0;
|
||||
} else {
|
||||
BytesToPopOnReturn = 0; // Callee pops nothing.
|
||||
BytesToPopOnReturn = 0; // Callee pops nothing.
|
||||
BytesCallerReserves = StackSize;
|
||||
}
|
||||
X86MachineFunctionInfo *FuncInfo = MF.getInfo<X86MachineFunctionInfo>();
|
||||
@ -1953,6 +1960,9 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG,
|
||||
bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
|
||||
SDOperand Callee = Op.getOperand(4);
|
||||
|
||||
assert(!(isVarArg && CC == CallingConv::Fast) &&
|
||||
"Var args not supported with calling convention fastcc");
|
||||
|
||||
// Analyze operands of the call, assigning locations to each operand.
|
||||
SmallVector<CCValAssign, 16> ArgLocs;
|
||||
CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs);
|
||||
@ -1964,7 +1974,7 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG,
|
||||
// Get a count of how many bytes are to be pushed on the stack.
|
||||
unsigned NumBytes = CCInfo.getNextStackOffset();
|
||||
if (CC == CallingConv::Fast)
|
||||
NumBytes = GetAlignedArgumentStackSize(NumBytes,DAG);
|
||||
NumBytes = GetAlignedArgumentStackSize(NumBytes, DAG);
|
||||
|
||||
Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, getPointerTy()));
|
||||
|
||||
@ -2019,9 +2029,6 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG,
|
||||
}
|
||||
|
||||
if (isVarArg) {
|
||||
assert ( CallingConv::Fast != CC &&
|
||||
"Var args not supported with calling convention fastcc");
|
||||
|
||||
// From AMD64 ABI document:
|
||||
// For calls that may call functions that use varargs or stdargs
|
||||
// (prototype-less calls or calls to functions containing ellipsis (...) in
|
||||
@ -2051,9 +2058,10 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG,
|
||||
&& !Subtarget->GVRequiresExtraLoad(G->getGlobal(),
|
||||
getTargetMachine(), true))
|
||||
Callee = DAG.getTargetGlobalAddress(G->getGlobal(), getPointerTy());
|
||||
} else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee))
|
||||
} else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) {
|
||||
if (getTargetMachine().getCodeModel() != CodeModel::Large)
|
||||
Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy());
|
||||
}
|
||||
|
||||
// Returns a chain & a flag for retval copy to use.
|
||||
SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag);
|
||||
@ -2070,23 +2078,23 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG,
|
||||
if (InFlag.Val)
|
||||
Ops.push_back(InFlag);
|
||||
|
||||
Chain = DAG.getNode(X86ISD::CALL,
|
||||
NodeTys, &Ops[0], Ops.size());
|
||||
Chain = DAG.getNode(X86ISD::CALL, NodeTys, &Ops[0], Ops.size());
|
||||
InFlag = Chain.getValue(1);
|
||||
int NumBytesForCalleeToPush = 0;
|
||||
if (CC==CallingConv::Fast && PerformTailCallOpt) {
|
||||
|
||||
// Create the CALLSEQ_END node.
|
||||
unsigned NumBytesForCalleeToPush = 0;
|
||||
if (CC == CallingConv::Fast && PerformTailCallOpt) {
|
||||
NumBytesForCalleeToPush = NumBytes; // Callee pops everything
|
||||
} else {
|
||||
NumBytesForCalleeToPush = 0; // Callee pops nothing.
|
||||
}
|
||||
|
||||
// Returns a flag for retval copy to use.
|
||||
NodeTys = DAG.getVTList(MVT::Other, MVT::Flag);
|
||||
Ops.clear();
|
||||
Ops.push_back(Chain);
|
||||
Ops.push_back(DAG.getConstant(NumBytes, getPointerTy()));
|
||||
Ops.push_back(DAG.getConstant(NumBytesForCalleeToPush, getPointerTy()));
|
||||
Ops.push_back(InFlag);
|
||||
Chain = DAG.getNode(ISD::CALLSEQ_END, NodeTys, &Ops[0], Ops.size());
|
||||
Chain = DAG.getCALLSEQ_END(Chain,
|
||||
DAG.getConstant(NumBytes, getPointerTy()),
|
||||
DAG.getConstant(NumBytesForCalleeToPush,
|
||||
getPointerTy()),
|
||||
InFlag);
|
||||
InFlag = Chain.getValue(1);
|
||||
|
||||
// Handle result values, copying them out of physregs into vregs that we
|
||||
@ -4757,8 +4765,7 @@ X86TargetLowering::LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG) {
|
||||
default:
|
||||
assert(0 && "Unsupported calling convention");
|
||||
case CallingConv::Fast:
|
||||
return LowerCCCArguments(Op,DAG, true);
|
||||
// Falls through
|
||||
return LowerCCCArguments(Op, DAG, true);
|
||||
case CallingConv::C:
|
||||
return LowerCCCArguments(Op, DAG);
|
||||
case CallingConv::X86_StdCall:
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user