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Turn off assertion, conservatively compute liveness for live-in un-allocatable registers.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150768 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Lang Hames 2012-02-17 00:18:18 +00:00
parent 178d870795
commit af8b34dae9
1 changed files with 10 additions and 8 deletions
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18
lib/CodeGen/LiveIntervalAnalysis.cpp
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@ -360,7 +360,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
} }
#ifndef NDEBUG #ifndef NDEBUG
static bool isRegLiveOutOf(const MachineBasicBlock *MBB, unsigned Reg) { static bool isRegLiveIntoSuccessor(const MachineBasicBlock *MBB, unsigned Reg) {
for (MachineBasicBlock::const_succ_iterator SI = MBB->succ_begin(), for (MachineBasicBlock::const_succ_iterator SI = MBB->succ_begin(),
SE = MBB->succ_end(); SE = MBB->succ_end();
SI != SE; ++SI) { SI != SE; ++SI) {
@ -439,7 +439,8 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
} else { } else {
// Unreserved, unallocable registers like EFLAGS can be live across basic // Unreserved, unallocable registers like EFLAGS can be live across basic
// block boundaries. // block boundaries.
assert(isRegLiveOutOf(MBB, interval.reg) && "Unreserved reg not live-out?"); assert(isRegLiveIntoSuccessor(MBB, interval.reg) &&
"Unreserved reg not live-out?");
end = getMBBEndIdx(MBB); end = getMBBEndIdx(MBB);
} }
exit: exit:
@ -526,15 +527,16 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
// Live-in register might not be used at all. // Live-in register might not be used at all.
if (!SeenDefUse) { if (!SeenDefUse) {
if (isAllocatable(interval.reg) || isReserved(interval.reg)) { if (isAllocatable(interval.reg) ||
// This must be an entry block or landing pad - we asserted so on entry !isRegLiveIntoSuccessor(MBB, interval.reg)) {
// to the function. For these blocks the interval is dead on entry, so // Allocatable registers are never live through.
// we won't emit a live-range for it. // Non-allocatable registers that aren't live into any successors also
// aren't live through.
DEBUG(dbgs() << " dead"); DEBUG(dbgs() << " dead");
return; return;
} else { } else {
assert(isRegLiveOutOf(MBB, interval.reg) && // If we get here the register is non-allocatable and live into some
"Live in reg untouched in block should be be live through."); // successor. We'll conservatively assume it's live-through.
DEBUG(dbgs() << " live through"); DEBUG(dbgs() << " live through");
end = getMBBEndIdx(MBB); end = getMBBEndIdx(MBB);
} }