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ARM assmebler parsing for two-operand VMUL instructions.

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Combined destination and first source operand for f32 variant of the VMUL
(by scalar) instruction.

rdar://10522016

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145842 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-12-05 19:55:46 +00:00
parent e15402f92b
commit afb500ace1
2 changed files with 11 additions and 0 deletions
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2
lib/Target/ARM/ARMInstrFormats.td
View File

@ -231,6 +231,8 @@ class VFP2InstAlias<string Asm, dag Result, bit Emit = 0b1>
: InstAlias<Asm, Result, Emit>, Requires<[HasVFP2]>;
class VFP3InstAlias<string Asm, dag Result, bit Emit = 0b1>
: InstAlias<Asm, Result, Emit>, Requires<[HasVFP3]>;
class NEONInstAlias<string Asm, dag Result, bit Emit = 0b1>
: InstAlias<Asm, Result, Emit>, Requires<[HasNEON]>;
//===----------------------------------------------------------------------===//
// ARM Instruction templates.

9
lib/Target/ARM/ARMInstrNEON.td
View File

@ -3672,6 +3672,15 @@ def VMULslfd : N3VDSL<0b10, 0b1001, IIC_VBIND, "vmul", "f32", v2f32, fmul>;
def VMULslfq : N3VQSL<0b10, 0b1001, IIC_VBINQ, "vmul", "f32", v4f32,
v2f32, fmul>;
// Two-operand aliases.
def : NEONInstAlias<"vmul${p}.f32 $Ddn $Dm$lane",
(VMULslfd DPR:$Ddn, DPR:$Ddn, DPR_VFP2:$Dm,
VectorIndex32:$lane, pred:$p)>;
def : NEONInstAlias<"vmul${p}.f32 $Qdn $Dm$lane",
(VMULslfq QPR:$Qdn, QPR:$Qdn, DPR_VFP2:$Dm,
VectorIndex32:$lane, pred:$p)>;
def : Pat<(v8i16 (mul (v8i16 QPR:$src1),
(v8i16 (NEONvduplane (v8i16 QPR:$src2), imm:$lane)))),
(v8i16 (VMULslv8i16 (v8i16 QPR:$src1),