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llvm-objdump output hex to match binutils' objdump

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Patch by Ted Woodward

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204409 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Greg Fitzgerald
2014-03-20 22:55:15 +00:00
parent f59d05cf35
commit aff0ab4e7c
4 changed files with 51 additions and 28 deletions
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2
test/MC/ARM/elf-jump24-fixup.s
View File

@ -6,4 +6,4 @@
foo: foo:
b.w bar b.w bar
@ CHECK: {{[0-9]+}} R_ARM_THM_JUMP24 bar @ CHECK: {{[0-9a-f]+}} R_ARM_THM_JUMP24 bar

50
test/MC/ARM/symbol-variants.s
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@ -13,73 +13,73 @@
.word f02(NONE) .word f02(NONE)
.word f03(none) .word f03(none)
@CHECK: 8 R_ARM_NONE f02 @CHECK: 8 R_ARM_NONE f02
@CHECK: 12 R_ARM_NONE f03 @CHECK: c R_ARM_NONE f03
@ plt @ plt
bl f04(PLT) bl f04(PLT)
bl f05(plt) bl f05(plt)
@ARM: 16 R_ARM_PLT32 f04 @ARM: 10 R_ARM_PLT32 f04
@ARM: 20 R_ARM_PLT32 f05 @ARM: 14 R_ARM_PLT32 f05
@THUMB: 16 R_ARM_THM_CALL f04 @THUMB: 10 R_ARM_THM_CALL f04
@THUMB: 20 R_ARM_THM_CALL f05 @THUMB: 14 R_ARM_THM_CALL f05
@ got @ got
.word f06(GOT) .word f06(GOT)
.word f07(got) .word f07(got)
@CHECK: 24 R_ARM_GOT_BREL f06 @CHECK: 18 R_ARM_GOT_BREL f06
@CHECK: 28 R_ARM_GOT_BREL f07 @CHECK: 1c R_ARM_GOT_BREL f07
@ gotoff @ gotoff
.word f08(GOTOFF) .word f08(GOTOFF)
.word f09(gotoff) .word f09(gotoff)
@CHECK: 32 R_ARM_GOTOFF32 f08 @CHECK: 20 R_ARM_GOTOFF32 f08
@CHECK: 36 R_ARM_GOTOFF32 f09 @CHECK: 24 R_ARM_GOTOFF32 f09
@ tpoff @ tpoff
.word f10(TPOFF) .word f10(TPOFF)
.word f11(tpoff) .word f11(tpoff)
@CHECK: 40 R_ARM_TLS_LE32 f10 @CHECK: 28 R_ARM_TLS_LE32 f10
@CHECK: 44 R_ARM_TLS_LE32 f11 @CHECK: 2c R_ARM_TLS_LE32 f11
@ tlsgd @ tlsgd
.word f12(TLSGD) .word f12(TLSGD)
.word f13(tlsgd) .word f13(tlsgd)
@CHECK: 48 R_ARM_TLS_GD32 f12 @CHECK: 30 R_ARM_TLS_GD32 f12
@CHECK: 52 R_ARM_TLS_GD32 f13 @CHECK: 34 R_ARM_TLS_GD32 f13
@ target1 @ target1
.word f14(TARGET1) .word f14(TARGET1)
.word f15(target1) .word f15(target1)
@CHECK: 56 R_ARM_TARGET1 f14 @CHECK: 38 R_ARM_TARGET1 f14
@CHECK: 60 R_ARM_TARGET1 f15 @CHECK: 3c R_ARM_TARGET1 f15
@ target2 @ target2
.word f16(TARGET2) .word f16(TARGET2)
.word f17(target2) .word f17(target2)
@CHECK: 64 R_ARM_TARGET2 f16 @CHECK: 40 R_ARM_TARGET2 f16
@CHECK: 68 R_ARM_TARGET2 f17 @CHECK: 44 R_ARM_TARGET2 f17
@ prel31 @ prel31
.word f18(PREL31) .word f18(PREL31)
.word f19(prel31) .word f19(prel31)
@CHECK: 72 R_ARM_PREL31 f18 @CHECK: 48 R_ARM_PREL31 f18
@CHECK: 76 R_ARM_PREL31 f19 @CHECK: 4c R_ARM_PREL31 f19
@ tlsldo @ tlsldo
.word f20(TLSLDO) .word f20(TLSLDO)
.word f21(tlsldo) .word f21(tlsldo)
@CHECK: 80 R_ARM_TLS_LDO32 f20 @CHECK: 50 R_ARM_TLS_LDO32 f20
@CHECK: 84 R_ARM_TLS_LDO32 f21 @CHECK: 54 R_ARM_TLS_LDO32 f21
@ tlscall @ tlscall
.word f22(TLSCALL) .word f22(TLSCALL)
.word f23(tlscall) .word f23(tlscall)
@ CHECK: 88 R_ARM_TLS_CALL f22 @ CHECK: 58 R_ARM_TLS_CALL f22
@ CHECK: 92 R_ARM_TLS_CALL f23 @ CHECK: 5c R_ARM_TLS_CALL f23
@ tlsdesc @ tlsdesc
.word f24(TLSDESC) .word f24(TLSDESC)
.word f25(tlsdesc) .word f25(tlsdesc)
@ CHECK: 96 R_ARM_TLS_GOTDESC f24 @ CHECK: 60 R_ARM_TLS_GOTDESC f24
@ CHECK: 100 R_ARM_TLS_GOTDESC f25 @ CHECK: 64 R_ARM_TLS_GOTDESC f25

17
test/tools/llvm-objdump/hex-relocation-addr.test Normal file
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@ -0,0 +1,17 @@
// This test checks that relocation addresses are printed in hex
// RUN: llvm-objdump -r %p/Inputs/win64-unwind.exe.coff-x86_64.obj | FileCheck %s
CHECK: RELOCATION RECORDS FOR [.pdata]:
CHECK-NEXT: 0 IMAGE_REL_AMD64_ADDR32NB func
CHECK-NEXT: 4 IMAGE_REL_AMD64_ADDR32NB func
CHECK-NEXT: 8 IMAGE_REL_AMD64_ADDR32NB .xdata
CHECK-NEXT: c IMAGE_REL_AMD64_ADDR32NB func
CHECK-NEXT: 10 IMAGE_REL_AMD64_ADDR32NB func
CHECK-NEXT: 14 IMAGE_REL_AMD64_ADDR32NB .xdata
CHECK-NEXT: 18 IMAGE_REL_AMD64_ADDR32NB smallFunc
CHECK-NEXT: 1c IMAGE_REL_AMD64_ADDR32NB smallFunc
CHECK-NEXT: 20 IMAGE_REL_AMD64_ADDR32NB .xdata
CHECK-NEXT: 24 IMAGE_REL_AMD64_ADDR32NB allocFunc
CHECK-NEXT: 28 IMAGE_REL_AMD64_ADDR32NB allocFunc
CHECK-NEXT: 2c IMAGE_REL_AMD64_ADDR32NB .xdata

10
tools/llvm-objdump/llvm-objdump.cpp
View File

@ -382,6 +382,9 @@ static void DisassembleObject(const ObjectFile *Obj, bool InlineRelocs) {
} }
} }
StringRef Fmt = Obj->getBytesInAddress() > 4 ? "\t\t%016" PRIx64 ": " :
"\t\t\t%08" PRIx64 ": ";
// Create a mapping, RelocSecs = SectionRelocMap[S], where sections // Create a mapping, RelocSecs = SectionRelocMap[S], where sections
// in RelocSecs contain the relocations for section S. // in RelocSecs contain the relocations for section S.
error_code EC; error_code EC;
@ -536,7 +539,7 @@ static void DisassembleObject(const ObjectFile *Obj, bool InlineRelocs) {
if (error(rel_cur->getTypeName(name))) goto skip_print_rel; if (error(rel_cur->getTypeName(name))) goto skip_print_rel;
if (error(rel_cur->getValueString(val))) goto skip_print_rel; if (error(rel_cur->getValueString(val))) goto skip_print_rel;
outs() << format("\t\t\t%8" PRIx64 ": ", SectionAddr + addr) << name outs() << format(Fmt.data(), SectionAddr + addr) << name
<< "\t" << val << "\n"; << "\t" << val << "\n";
skip_print_rel: skip_print_rel:
@ -548,6 +551,8 @@ static void DisassembleObject(const ObjectFile *Obj, bool InlineRelocs) {
} }
static void PrintRelocations(const ObjectFile *Obj) { static void PrintRelocations(const ObjectFile *Obj) {
StringRef Fmt = Obj->getBytesInAddress() > 4 ? "%016" PRIx64 :
"%08" PRIx64;
for (const SectionRef &Section : Obj->sections()) { for (const SectionRef &Section : Obj->sections()) {
if (Section.relocation_begin() == Section.relocation_end()) if (Section.relocation_begin() == Section.relocation_end())
continue; continue;
@ -570,7 +575,8 @@ static void PrintRelocations(const ObjectFile *Obj) {
continue; continue;
if (error(Reloc.getValueString(valuestr))) if (error(Reloc.getValueString(valuestr)))
continue; continue;
outs() << address << " " << relocname << " " << valuestr << "\n"; outs() << format(Fmt.data(), address) << " " << relocname << " "
<< valuestr << "\n";
} }
outs() << "\n"; outs() << "\n";
} }