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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-15 07:34:33 +00:00
Put FrameSetup flag on x86 instructions that set up the call frame. No
functionality change. Later on, we'll use the flag to emit SEH pseudo-ops that describe how the call frame was built. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132880 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -160,8 +160,10 @@ void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
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Opc = isSub
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? (Is64Bit ? X86::PUSH64r : X86::PUSH32r)
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: (Is64Bit ? X86::POP64r : X86::POP32r);
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BuildMI(MBB, MBBI, DL, TII.get(Opc))
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MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc))
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.addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub));
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if (isSub)
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MI->setFlag(MachineInstr::FrameSetup);
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Offset -= ThisVal;
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continue;
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}
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@ -171,6 +173,8 @@ void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
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BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
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.addReg(StackPtr)
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.addImm(ThisVal);
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if (isSub)
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MI->setFlag(MachineInstr::FrameSetup);
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MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
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Offset -= ThisVal;
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}
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@ -409,7 +413,8 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const {
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TII.get(getSUBriOpcode(Is64Bit, -TailCallReturnAddrDelta)),
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StackPtr)
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.addReg(StackPtr)
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.addImm(-TailCallReturnAddrDelta);
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.addImm(-TailCallReturnAddrDelta)
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.setMIFlag(MachineInstr::FrameSetup);
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MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
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}
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@ -447,7 +452,8 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const {
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// Save EBP/RBP into the appropriate stack slot.
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BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
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.addReg(FramePtr, RegState::Kill);
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.addReg(FramePtr, RegState::Kill)
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.setMIFlag(MachineInstr::FrameSetup);
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if (needsFrameMoves) {
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// Mark the place where EBP/RBP was saved.
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@ -474,7 +480,8 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const {
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// Update EBP with the new base value...
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BuildMI(MBB, MBBI, DL,
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TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), FramePtr)
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.addReg(StackPtr);
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.addReg(StackPtr)
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.setMIFlag(MachineInstr::FrameSetup);
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if (needsFrameMoves) {
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// Mark effective beginning of when frame pointer becomes valid.
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@ -919,7 +926,8 @@ bool X86FrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
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// X86RegisterInfo::emitPrologue will handle spilling of frame register.
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continue;
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CalleeFrameSize += SlotSize;
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BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, RegState::Kill);
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BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, RegState::Kill)
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.setMIFlag(MachineInstr::FrameSetup);
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}
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X86FI->setCalleeSavedFrameSize(CalleeFrameSize);
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