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[mips] Set HI/LO registers' HWEncoding field.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192661 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2013-10-15 01:00:00 +00:00
parent b6ed641c71
commit b004913417
2 changed files with 39 additions and 8 deletions
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16
lib/Target/Mips/MipsRegisterInfo.td
View File

@ -179,14 +179,14 @@ let Namespace = "Mips" in {
DwarfRegNum<[!add(I, 32)]>;
// Hi/Lo registers
def HI0 : Register<"ac0">, DwarfRegNum<[64]>;
def HI1 : Register<"ac1">, DwarfRegNum<[176]>;
def HI2 : Register<"ac2">, DwarfRegNum<[178]>;
def HI3 : Register<"ac3">, DwarfRegNum<[180]>;
def LO0 : Register<"ac0">, DwarfRegNum<[65]>;
def LO1 : Register<"ac1">, DwarfRegNum<[177]>;
def LO2 : Register<"ac2">, DwarfRegNum<[179]>;
def LO3 : Register<"ac3">, DwarfRegNum<[181]>;
def HI0 : MipsReg<0, "ac0">, DwarfRegNum<[64]>;
def HI1 : MipsReg<1, "ac1">, DwarfRegNum<[176]>;
def HI2 : MipsReg<2, "ac2">, DwarfRegNum<[178]>;
def HI3 : MipsReg<3, "ac3">, DwarfRegNum<[180]>;
def LO0 : MipsReg<0, "ac0">, DwarfRegNum<[65]>;
def LO1 : MipsReg<1, "ac1">, DwarfRegNum<[177]>;
def LO2 : MipsReg<2, "ac2">, DwarfRegNum<[179]>;
def LO3 : MipsReg<3, "ac3">, DwarfRegNum<[181]>;
let SubRegIndices = [sub_32] in {
def HI0_64 : RegisterWithSubRegs<"hi", [HI0]>;

31
test/MC/Mips/mips-dsp-instructions.s
View File

@ -32,6 +32,22 @@
# CHECK: maddu $ac0, $8, $9 # encoding: [0x71,0x09,0x00,0x01]
# CHECK: msub $ac3, $10, $11 # encoding: [0x71,0x4b,0x18,0x04]
# CHECK: msubu $ac2, $12, $13 # encoding: [0x71,0x8d,0x10,0x05]
# CHECK: mfhi $14, $ac1 # encoding: [0x00,0x20,0x70,0x10]
# CHECK: mflo $15, $ac0 # encoding: [0x00,0x00,0x78,0x12]
# CHECK: mthi $16, $ac3 # encoding: [0x02,0x00,0x18,0x11]
# CHECK: mtlo $17, $ac2 # encoding: [0x02,0x20,0x10,0x13]
# CHECK: mult $2, $3 # encoding: [0x00,0x43,0x00,0x18]
# CHECK: multu $4, $5 # encoding: [0x00,0x85,0x00,0x19]
# CHECK: madd $6, $7 # encoding: [0x70,0xc7,0x00,0x00]
# CHECK: maddu $8, $9 # encoding: [0x71,0x09,0x00,0x01]
# CHECK: msub $10, $11 # encoding: [0x71,0x4b,0x00,0x04]
# CHECK: msubu $12, $13 # encoding: [0x71,0x8d,0x00,0x05]
# CHECK: mfhi $14 # encoding: [0x00,0x00,0x70,0x10]
# CHECK: mflo $15 # encoding: [0x00,0x00,0x78,0x12]
# CHECK: mthi $16 # encoding: [0x02,0x00,0x00,0x11]
# CHECK: mtlo $17 # encoding: [0x02,0x20,0x00,0x13]
precrq.qb.ph $16,$17,$18
precrq.ph.w $17,$18,$19
@ -64,3 +80,18 @@
maddu $ac0, $8, $9
msub $ac3, $10, $11
msubu $ac2, $12, $13
mfhi $14, $ac1
mflo $15, $ac0
mthi $16, $ac3
mtlo $17, $ac2
mult $2, $3
multu $4, $5
madd $6, $7
maddu $8, $9
msub $10, $11
msubu $12, $13
mfhi $14
mflo $15
mthi $16
mtlo $17