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Match more post-indexed ops.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31569 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2006-11-08 20:27:27 +00:00
parent 185f755deb
commit b00dddd164
1 changed files with 6 additions and 2 deletions
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8
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@@ -301,8 +301,12 @@ namespace {
SDOperand BasePtr; SDOperand BasePtr;
SDOperand Offset; SDOperand Offset;
ISD::MemOpAddrMode AM = ISD::UNINDEXED; ISD::MemOpAddrMode AM = ISD::UNINDEXED;
if (TLI.getPostIndexedAddressParts(Op, VT, BasePtr, Offset, AM,DAG) && if (TLI.getPostIndexedAddressParts(Op, VT, BasePtr, Offset, AM,DAG)) {
BasePtr == Ptr) { if (Ptr == Offset)
std::swap(BasePtr, Offset);
if (Ptr != BasePtr)
continue;
// Try turning it into a post-indexed load / store except when // Try turning it into a post-indexed load / store except when
// 1) Op must be independent of N, i.e. Op is neither a predecessor // 1) Op must be independent of N, i.e. Op is neither a predecessor
// nor a successor of N. Otherwise, if Op is folded that would // nor a successor of N. Otherwise, if Op is folded that would