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Store fix

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20004 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2005-02-02 17:32:39 +00:00
parent ddfacc35d9
commit b014d3e35b
2 changed files with 37 additions and 15 deletions
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46
lib/Target/Alpha/AlphaISelPattern.cpp
View File

@ -1170,19 +1170,39 @@ void ISel::Select(SDOperand N) {
return; return;
case ISD::STORE: case ISD::STORE:
Select(N.getOperand(0)); {
Tmp1 = SelectExpr(N.getOperand(1)); //value Select(N.getOperand(0));
if (N.getOperand(2).getOpcode() == ISD::GlobalAddress) Tmp1 = SelectExpr(N.getOperand(1)); //value
{ MVT::ValueType DestType = N.getOperand(1).getValueType();
AlphaLowering.restoreGP(BB); if (N.getOperand(2).getOpcode() == ISD::GlobalAddress)
BuildMI(BB, Alpha::STORE, 2).addReg(Tmp1).addGlobalAddress(cast<GlobalAddressSDNode>(N.getOperand(2))->getGlobal()); {
} AlphaLowering.restoreGP(BB);
else if (DestType == MVT::i64) Opc = Alpha::STORE;
{ else if (DestType == MVT::f64) Opc = Alpha::STT_SYM;
Tmp2 = SelectExpr(N.getOperand(2)); //address else if (DestType == MVT::f32) Opc = Alpha::STS_SYM;
BuildMI(BB, Alpha::STQ, 3).addReg(Tmp1).addImm(0).addReg(Tmp2); else assert(0 && "unknown Type in store");
} BuildMI(BB, Opc, 2).addReg(Tmp1).addGlobalAddress(cast<GlobalAddressSDNode>(N.getOperand(2))->getGlobal());
return; }
else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N.getOperand(2)))
{
AlphaLowering.restoreGP(BB);
if (DestType == MVT::i64) Opc = Alpha::STORE;
else if (DestType == MVT::f64) Opc = Alpha::STT_SYM;
else if (DestType == MVT::f32) Opc = Alpha::STS_SYM;
else assert(0 && "unknown Type in store");
BuildMI(BB, Opc, 2).addReg(Tmp1).addConstantPoolIndex(CP->getIndex());
}
else
{
Tmp2 = SelectExpr(N.getOperand(2)); //address
if (DestType == MVT::i64) Opc = Alpha::STQ;
else if (DestType == MVT::f64) Opc = Alpha::STT;
else if (DestType == MVT::f32) Opc = Alpha::STS;
else assert(0 && "unknown Type in store");
BuildMI(BB, Opc, 3).addReg(Tmp1).addImm(0).addReg(Tmp2);
}
return;
}
case ISD::EXTLOAD: case ISD::EXTLOAD:
case ISD::SEXTLOAD: case ISD::SEXTLOAD:

6
lib/Target/Alpha/AlphaInstrInfo.td
View File

@ -62,8 +62,10 @@ let Uses = [R29, R28] in {
def LOAD : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "ldq $RA,$DISP">; //Load quadword def LOAD : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "ldq $RA,$DISP">; //Load quadword
def LDW : PseudoInstAlpha<(ops GPRC:$RA, s16imm:$DISP, GPRC:$RB), "ldw $RA,$DISP($RB)">; // Load sign-extended word def LDW : PseudoInstAlpha<(ops GPRC:$RA, s16imm:$DISP, GPRC:$RB), "ldw $RA,$DISP($RB)">; // Load sign-extended word
def LDB : PseudoInstAlpha<(ops GPRC:$RA, s16imm:$DISP, GPRC:$RB), "ldb $RA,$DISP($RB)">; //Load byte def LDB : PseudoInstAlpha<(ops GPRC:$RA, s16imm:$DISP, GPRC:$RB), "ldb $RA,$DISP($RB)">; //Load byte
def LDS_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "lds $RA,$DISP">; //Load quadword def LDS_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "lds $RA,$DISP">; //Load float
def LDT_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "ldt $RA,$DISP">; //Load quadword def LDT_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "ldt $RA,$DISP">; //Load double
def STS_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "sts $RA,$DISP">; //store float
def STT_SYM : PseudoInstAlpha<(ops GPRC:$RA, s64imm:$DISP), "stt $RA,$DISP">; //store double
} }
let Uses = [R28, R23, R24, R25, R26] in let Uses = [R28, R23, R24, R25, R26] in