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R600: Coding style - remove empty spaces from the beginning of functions

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No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170923 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2012-12-21 20:12:02 +00:00
parent eef0d5a0d6
commit b06c540f9f
3 changed files with 0 additions and 35 deletions
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18
lib/Target/R600/AMDGPUStructurizeCFG.cpp
View File

@ -178,7 +178,6 @@ char AMDGPUStructurizeCFG::ID = 0;
/// \brief Initialize the types and constants used in the pass
bool AMDGPUStructurizeCFG::doInitialization(Region *R, RGPassManager &RGM) {
LLVMContext &Context = R->getEntry()->getContext();
Boolean = Type::getInt1Ty(Context);
@ -191,7 +190,6 @@ bool AMDGPUStructurizeCFG::doInitialization(Region *R, RGPassManager &RGM) {
/// \brief Build up the general order of nodes
void AMDGPUStructurizeCFG::orderNodes() {
scc_iterator<Region *> I = scc_begin(ParentRegion),
E = scc_end(ParentRegion);
for (Order.clear(); I != E; ++I) {
@ -203,7 +201,6 @@ void AMDGPUStructurizeCFG::orderNodes() {
/// \brief Build blocks and loop predicates
void AMDGPUStructurizeCFG::buildPredicate(BranchInst *Term, unsigned Idx,
BBPredicates &Pred, bool Invert) {
Value *True = Invert ? BoolFalse : BoolTrue;
Value *False = Invert ? BoolTrue : BoolFalse;
@ -251,7 +248,6 @@ void AMDGPUStructurizeCFG::buildPredicate(BranchInst *Term, unsigned Idx,
/// \brief Analyze the successors of each block and build up predicates
void AMDGPUStructurizeCFG::analyzeBlock(BasicBlock *BB) {
pred_iterator PI = pred_begin(BB), PE = pred_end(BB);
BBPredicates &Pred = Predicates[BB];
@ -269,7 +265,6 @@ void AMDGPUStructurizeCFG::analyzeBlock(BasicBlock *BB) {
/// \brief Analyze the conditions leading to loop to a previous block
void AMDGPUStructurizeCFG::analyzeLoop(BasicBlock *BB, unsigned &LoopIdx) {
BranchInst *Term = cast<BranchInst>(BB->getTerminator());
for (unsigned i = 0, e = Term->getNumSuccessors(); i != e; ++i) {
@ -291,7 +286,6 @@ void AMDGPUStructurizeCFG::analyzeLoop(BasicBlock *BB, unsigned &LoopIdx) {
/// \brief Collect various loop and predicate infos
void AMDGPUStructurizeCFG::collectInfos() {
unsigned Number = 0, LoopIdx = ~0;
// Reset predicate
@ -317,7 +311,6 @@ void AMDGPUStructurizeCFG::collectInfos() {
/// \brief Does A dominate all the predicates of B ?
bool AMDGPUStructurizeCFG::dominatesPredicates(BasicBlock *A, BasicBlock *B) {
BBPredicates &Preds = Predicates[B];
for (BBPredicates::iterator PI = Preds.begin(), PE = Preds.end();
PI != PE; ++PI) {
@ -330,7 +323,6 @@ bool AMDGPUStructurizeCFG::dominatesPredicates(BasicBlock *A, BasicBlock *B) {
/// \brief Remove phi values from all successors and the remove the terminator.
void AMDGPUStructurizeCFG::killTerminator(BasicBlock *BB) {
TerminatorInst *Term = BB->getTerminator();
if (!Term)
return;
@ -350,7 +342,6 @@ void AMDGPUStructurizeCFG::killTerminator(BasicBlock *BB) {
/// Second: Handle the first successor directly if the resulting nodes successor
/// predicates are still dominated by the original entry
RegionNode *AMDGPUStructurizeCFG::skipChained(RegionNode *Node) {
BasicBlock *Entry = Node->getEntry();
// Skip forward as long as it is just a linear flow
@ -418,7 +409,6 @@ RegionNode *AMDGPUStructurizeCFG::skipChained(RegionNode *Node) {
/// \brief Remove all PHI values coming from "From" into "To" and remember
/// them in DeletedPhis
void AMDGPUStructurizeCFG::delPhiValues(BasicBlock *From, BasicBlock *To) {
PhiMap &Map = DeletedPhis[To];
for (BasicBlock::iterator I = To->begin(), E = To->end();
I != E && isa<PHINode>(*I);) {
@ -433,7 +423,6 @@ void AMDGPUStructurizeCFG::delPhiValues(BasicBlock *From, BasicBlock *To) {
/// \brief Add the PHI values back once we knew the new predecessor
void AMDGPUStructurizeCFG::addPhiValues(BasicBlock *From, BasicBlock *To) {
if (!DeletedPhis.count(To))
return;
@ -470,7 +459,6 @@ void AMDGPUStructurizeCFG::addPhiValues(BasicBlock *From, BasicBlock *To) {
/// \brief Create a new flow node and update dominator tree and region info
BasicBlock *AMDGPUStructurizeCFG::getNextFlow(BasicBlock *Prev) {
LLVMContext &Context = Func->getContext();
BasicBlock *Insert = Order.empty() ? ParentRegion->getExit() :
Order.back()->getEntry();
@ -485,7 +473,6 @@ BasicBlock *AMDGPUStructurizeCFG::getNextFlow(BasicBlock *Prev) {
/// \brief Can we predict that this node will always be called?
bool AMDGPUStructurizeCFG::isPredictableTrue(BasicBlock *Prev,
BasicBlock *Node) {
BBPredicates &Preds = Predicates[Node];
bool Dominated = false;
@ -505,7 +492,6 @@ bool AMDGPUStructurizeCFG::isPredictableTrue(BasicBlock *Prev,
/// instructions at node exits
BasicBlock *AMDGPUStructurizeCFG::wireFlowBlock(BasicBlock *Prev,
RegionNode *Node) {
BasicBlock *Entry = Node->getEntry();
if (LoopStart == Entry) {
@ -567,7 +553,6 @@ BasicBlock *AMDGPUStructurizeCFG::wireFlowBlock(BasicBlock *Prev,
/// After this function control flow looks like it should be, but
/// branches only have undefined conditions.
void AMDGPUStructurizeCFG::createFlow() {
DeletedPhis.clear();
BasicBlock *Prev = Order.pop_back_val()->getEntry();
@ -632,7 +617,6 @@ void AMDGPUStructurizeCFG::createFlow() {
/// \brief Insert the missing branch conditions
void AMDGPUStructurizeCFG::insertConditions() {
SSAUpdater PhiInserter;
for (BBVector::iterator FI = FlowsInserted.begin(), FE = FlowsInserted.end();
@ -660,7 +644,6 @@ void AMDGPUStructurizeCFG::insertConditions() {
/// Handle a rare case where the disintegrated nodes instructions
/// no longer dominate all their uses. Not sure if this is really nessasary
void AMDGPUStructurizeCFG::rebuildSSA() {
SSAUpdater Updater;
for (Region::block_iterator I = ParentRegion->block_begin(),
E = ParentRegion->block_end();
@ -702,7 +685,6 @@ void AMDGPUStructurizeCFG::rebuildSSA() {
/// \brief Run the transformation for each region found
bool AMDGPUStructurizeCFG::runOnRegion(Region *R, RGPassManager &RGM) {
if (R->isTopLevelRegion())
return false;

7
lib/Target/R600/SIAnnotateControlFlow.cpp
View File

@ -97,7 +97,6 @@ public:
}
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<DominatorTree>();
AU.addPreserved<DominatorTree>();
FunctionPass::getAnalysisUsage(AU);
@ -111,7 +110,6 @@ char SIAnnotateControlFlow::ID = 0;
/// \brief Initialize all the types and constants used in the pass
bool SIAnnotateControlFlow::doInitialization(Module &M) {
LLVMContext &Context = M.getContext();
Void = Type::getVoidTy(Context);
@ -166,7 +164,6 @@ void SIAnnotateControlFlow::push(BasicBlock *BB, Value *Saved) {
/// \brief Can the condition represented by this PHI node treated like
/// an "Else" block?
bool SIAnnotateControlFlow::isElse(PHINode *Phi) {
BasicBlock *IDom = DT->getNode(Phi->getParent())->getIDom()->getBlock();
for (unsigned i = 0, e = Phi->getNumIncomingValues(); i != e; ++i) {
if (Phi->getIncomingBlock(i) == IDom) {
@ -205,7 +202,6 @@ void SIAnnotateControlFlow::insertElse(BranchInst *Term) {
/// \brief Recursively handle the condition leading to a loop
void SIAnnotateControlFlow::handleLoopCondition(Value *Cond) {
if (PHINode *Phi = dyn_cast<PHINode>(Cond)) {
// Handle all non constant incoming values first
@ -262,7 +258,6 @@ void SIAnnotateControlFlow::handleLoopCondition(Value *Cond) {
/// \brief Handle a back edge (loop)
void SIAnnotateControlFlow::handleLoop(BranchInst *Term) {
BasicBlock *Target = Term->getSuccessor(1);
PHINode *Broken = PHINode::Create(Int64, 0, "", &Target->front());
@ -293,7 +288,6 @@ void SIAnnotateControlFlow::closeControlFlow(BasicBlock *BB) {
/// \brief Annotate the control flow with intrinsics so the backend can
/// recognize if/then/else and loops.
bool SIAnnotateControlFlow::runOnFunction(Function &F) {
DT = &getAnalysis<DominatorTree>();
for (df_iterator<BasicBlock *> I = df_begin(&F.getEntryBlock()),
@ -332,6 +326,5 @@ bool SIAnnotateControlFlow::runOnFunction(Function &F) {
/// \brief Create the annotation pass
FunctionPass *llvm::createSIAnnotateControlFlowPass() {
return new SIAnnotateControlFlow();
}

10
lib/Target/R600/SILowerControlFlow.cpp
View File

@ -101,7 +101,6 @@ FunctionPass *llvm::createSILowerControlFlowPass(TargetMachine &tm) {
}
void SILowerControlFlowPass::Skip(MachineInstr &From, MachineOperand &To) {
unsigned NumInstr = 0;
for (MachineBasicBlock *MBB = *From.getParent()->succ_begin();
@ -126,7 +125,6 @@ void SILowerControlFlowPass::Skip(MachineInstr &From, MachineOperand &To) {
}
void SILowerControlFlowPass::If(MachineInstr &MI) {
MachineBasicBlock &MBB = *MI.getParent();
DebugLoc DL = MI.getDebugLoc();
unsigned Reg = MI.getOperand(0).getReg();
@ -145,7 +143,6 @@ void SILowerControlFlowPass::If(MachineInstr &MI) {
}
void SILowerControlFlowPass::Else(MachineInstr &MI) {
MachineBasicBlock &MBB = *MI.getParent();
DebugLoc DL = MI.getDebugLoc();
unsigned Dst = MI.getOperand(0).getReg();
@ -164,7 +161,6 @@ void SILowerControlFlowPass::Else(MachineInstr &MI) {
}
void SILowerControlFlowPass::Break(MachineInstr &MI) {
MachineBasicBlock &MBB = *MI.getParent();
DebugLoc DL = MI.getDebugLoc();
@ -179,7 +175,6 @@ void SILowerControlFlowPass::Break(MachineInstr &MI) {
}
void SILowerControlFlowPass::IfBreak(MachineInstr &MI) {
MachineBasicBlock &MBB = *MI.getParent();
DebugLoc DL = MI.getDebugLoc();
@ -195,7 +190,6 @@ void SILowerControlFlowPass::IfBreak(MachineInstr &MI) {
}
void SILowerControlFlowPass::ElseBreak(MachineInstr &MI) {
MachineBasicBlock &MBB = *MI.getParent();
DebugLoc DL = MI.getDebugLoc();
@ -211,7 +205,6 @@ void SILowerControlFlowPass::ElseBreak(MachineInstr &MI) {
}
void SILowerControlFlowPass::Loop(MachineInstr &MI) {
MachineBasicBlock &MBB = *MI.getParent();
DebugLoc DL = MI.getDebugLoc();
unsigned Src = MI.getOperand(0).getReg();
@ -228,7 +221,6 @@ void SILowerControlFlowPass::Loop(MachineInstr &MI) {
}
void SILowerControlFlowPass::EndCf(MachineInstr &MI) {
MachineBasicBlock &MBB = *MI.getParent();
DebugLoc DL = MI.getDebugLoc();
unsigned Reg = MI.getOperand(0).getReg();
@ -242,7 +234,6 @@ void SILowerControlFlowPass::EndCf(MachineInstr &MI) {
}
void SILowerControlFlowPass::Branch(MachineInstr &MI) {
MachineBasicBlock *Next = MI.getParent()->getNextNode();
MachineBasicBlock *Target = MI.getOperand(0).getMBB();
if (Target == Next)
@ -252,7 +243,6 @@ void SILowerControlFlowPass::Branch(MachineInstr &MI) {
}
bool SILowerControlFlowPass::runOnMachineFunction(MachineFunction &MF) {
bool HaveCf = false;
for (MachineFunction::iterator BI = MF.begin(), BE = MF.end();