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Make X86TargetLowering::LowerSINT_TO_FP return without creating a dead

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stack slot and store if the  SINT_TO_FP is actually legal.  This allows
us to compile:

double a(double b) {return (unsigned)b;}

to:

_a:
	cvttsd2siq	%xmm0, %rax
	movl	%eax, %eax
	cvtsi2sdq	%rax, %xmm0
	ret

instead of:

_a:
	subq	$8, %rsp
	cvttsd2siq	%xmm0, %rax
	movl	%eax, %eax
	cvtsi2sdq	%rax, %xmm0
	addq	$8, %rsp
	ret

crazy.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47660 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2008-02-27 05:57:41 +00:00
parent 22eedf4eec
commit b09916bdfb
3 changed files with 22 additions and 29 deletions
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15
lib/Target/X86/README-X86-64.txt
View File

@ -236,18 +236,3 @@ on the result of the movb).
//===---------------------------------------------------------------------===// //===---------------------------------------------------------------------===//
This function:
double a(double b) {return (unsigned)b;}
compiles to this code:
_a:
subq $8, %rsp
cvttsd2siq %xmm0, %rax
movl %eax, %eax
cvtsi2sdq %rax, %xmm0
addq $8, %rsp
ret
note the dead rsp adjustments.
//===---------------------------------------------------------------------===//

26
lib/Target/X86/X86ISelLowering.cpp
View File

@ -4148,12 +4148,17 @@ SDOperand X86TargetLowering::LowerShift(SDOperand Op, SelectionDAG &DAG) {
} }
SDOperand X86TargetLowering::LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) { SDOperand X86TargetLowering::LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) {
assert(Op.getOperand(0).getValueType() <= MVT::i64 &&
Op.getOperand(0).getValueType() >= MVT::i16 &&
"Unknown SINT_TO_FP to lower!");
SDOperand Result;
MVT::ValueType SrcVT = Op.getOperand(0).getValueType(); MVT::ValueType SrcVT = Op.getOperand(0).getValueType();
assert(SrcVT <= MVT::i64 && SrcVT >= MVT::i16 &&
"Unknown SINT_TO_FP to lower!");
// These are really Legal; caller falls through into that case.
if (SrcVT == MVT::i32 && isScalarFPTypeInSSEReg(Op.getValueType()))
return SDOperand();
if (SrcVT == MVT::i64 && Op.getValueType() != MVT::f80 &&
Subtarget->is64Bit())
return SDOperand();
unsigned Size = MVT::getSizeInBits(SrcVT)/8; unsigned Size = MVT::getSizeInBits(SrcVT)/8;
MachineFunction &MF = DAG.getMachineFunction(); MachineFunction &MF = DAG.getMachineFunction();
int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size); int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size);
@ -4163,13 +4168,6 @@ SDOperand X86TargetLowering::LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) {
PseudoSourceValue::getFixedStack(), PseudoSourceValue::getFixedStack(),
SSFI); SSFI);
// These are really Legal; caller falls through into that case.
if (SrcVT == MVT::i32 && isScalarFPTypeInSSEReg(Op.getValueType()))
return Result;
if (SrcVT == MVT::i64 && Op.getValueType() != MVT::f80 &&
Subtarget->is64Bit())
return Result;
// Build the FILD // Build the FILD
SDVTList Tys; SDVTList Tys;
bool useSSE = isScalarFPTypeInSSEReg(Op.getValueType()); bool useSSE = isScalarFPTypeInSSEReg(Op.getValueType());
@ -4181,8 +4179,8 @@ SDOperand X86TargetLowering::LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) {
Ops.push_back(Chain); Ops.push_back(Chain);
Ops.push_back(StackSlot); Ops.push_back(StackSlot);
Ops.push_back(DAG.getValueType(SrcVT)); Ops.push_back(DAG.getValueType(SrcVT));
Result = DAG.getNode(useSSE ? X86ISD::FILD_FLAG :X86ISD::FILD, SDOperand Result = DAG.getNode(useSSE ? X86ISD::FILD_FLAG : X86ISD::FILD,
Tys, &Ops[0], Ops.size()); Tys, &Ops[0], Ops.size());
if (useSSE) { if (useSSE) {
Chain = Result.getValue(1); Chain = Result.getValue(1);

10
test/CodeGen/X86/x86-64-dead-stack-adjust.ll Normal file
View File

@ -0,0 +1,10 @@
; RUN: llvm-as < %s | not grep rsp
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin8"
define double @a(double %b) nounwind {
entry:
%tmp12 = fptoui double %b to i32 ; <i32> [#uses=1]
%tmp123 = uitofp i32 %tmp12 to double ; <double> [#uses=1]
ret double %tmp123
}