mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-07-19 02:25:01 +00:00
Update these register allocators to set the PhysRegUsed info in MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19791 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -51,6 +51,7 @@ namespace {
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const TargetMachine* tm_;
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const TargetMachine* tm_;
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const MRegisterInfo* mri_;
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const MRegisterInfo* mri_;
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LiveIntervals* li_;
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LiveIntervals* li_;
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bool *PhysRegsUsed;
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typedef std::vector<LiveInterval*> IntervalPtrs;
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typedef std::vector<LiveInterval*> IntervalPtrs;
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IntervalPtrs unhandled_, fixed_, active_, inactive_, handled_, spilled_;
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IntervalPtrs unhandled_, fixed_, active_, inactive_, handled_, spilled_;
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@@ -145,6 +146,11 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
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tm_ = &fn.getTarget();
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tm_ = &fn.getTarget();
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mri_ = tm_->getRegisterInfo();
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mri_ = tm_->getRegisterInfo();
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li_ = &getAnalysis<LiveIntervals>();
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li_ = &getAnalysis<LiveIntervals>();
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PhysRegsUsed = new bool[mri_->getNumRegs()];
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std::fill(PhysRegsUsed, PhysRegsUsed+mri_->getNumRegs(), false);
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fn.setUsedPhysRegs(PhysRegsUsed);
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if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
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if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
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vrm_.reset(new VirtRegMap(*mf_));
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vrm_.reset(new VirtRegMap(*mf_));
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if (!spiller_.get()) spiller_.reset(createSpiller());
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if (!spiller_.get()) spiller_.reset(createSpiller());
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@@ -256,8 +262,10 @@ void RA::initIntervalSets() {
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for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i){
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for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i){
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unhandled_.push_back(&i->second);
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unhandled_.push_back(&i->second);
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if (MRegisterInfo::isPhysicalRegister(i->second.reg))
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if (MRegisterInfo::isPhysicalRegister(i->second.reg)) {
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PhysRegsUsed[i->second.reg] = true;
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fixed_.push_back(&i->second);
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fixed_.push_back(&i->second);
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}
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}
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}
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}
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}
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@@ -48,6 +48,7 @@ namespace {
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const TargetMachine* tm_;
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const TargetMachine* tm_;
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const MRegisterInfo* mri_;
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const MRegisterInfo* mri_;
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LiveIntervals* li_;
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LiveIntervals* li_;
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bool *PhysRegsUsed;
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/// handled_ - Intervals are added to the handled_ set in the order of their
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/// handled_ - Intervals are added to the handled_ set in the order of their
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/// start value. This is uses for backtracking.
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/// start value. This is uses for backtracking.
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@@ -139,6 +140,10 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
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mri_ = tm_->getRegisterInfo();
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mri_ = tm_->getRegisterInfo();
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li_ = &getAnalysis<LiveIntervals>();
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li_ = &getAnalysis<LiveIntervals>();
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PhysRegsUsed = new bool[mri_->getNumRegs()];
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std::fill(PhysRegsUsed, PhysRegsUsed+mri_->getNumRegs(), false);
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fn.setUsedPhysRegs(PhysRegsUsed);
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if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
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if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
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vrm_.reset(new VirtRegMap(*mf_));
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vrm_.reset(new VirtRegMap(*mf_));
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if (!spiller_.get()) spiller_.reset(createSpiller());
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if (!spiller_.get()) spiller_.reset(createSpiller());
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@@ -147,6 +152,7 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
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linearScan();
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linearScan();
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// Rewrite spill code and update the PhysRegsUsed set.
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spiller_->runOnMachineFunction(*mf_, *vrm_);
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spiller_->runOnMachineFunction(*mf_, *vrm_);
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vrm_.reset(); // Free the VirtRegMap
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vrm_.reset(); // Free the VirtRegMap
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@@ -170,9 +176,10 @@ void RA::initIntervalSets()
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"interval sets should be empty on initialization");
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"interval sets should be empty on initialization");
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for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
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for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
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if (MRegisterInfo::isPhysicalRegister(i->second.reg))
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if (MRegisterInfo::isPhysicalRegister(i->second.reg)) {
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PhysRegsUsed[i->second.reg] = true;
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fixed_.push_back(std::make_pair(&i->second, i->second.begin()));
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fixed_.push_back(std::make_pair(&i->second, i->second.begin()));
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else
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} else
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unhandled_.push(&i->second);
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unhandled_.push(&i->second);
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}
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}
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}
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}
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@@ -133,13 +133,14 @@ namespace {
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};
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};
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}
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}
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bool SimpleSpiller::runOnMachineFunction(MachineFunction& MF,
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bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF,
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const VirtRegMap& VRM) {
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const VirtRegMap &VRM) {
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DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n");
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DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n");
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DEBUG(std::cerr << "********** Function: "
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DEBUG(std::cerr << "********** Function: "
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<< MF.getFunction()->getName() << '\n');
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<< MF.getFunction()->getName() << '\n');
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const TargetMachine& TM = MF.getTarget();
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const TargetMachine &TM = MF.getTarget();
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const MRegisterInfo& MRI = *TM.getRegisterInfo();
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const MRegisterInfo &MRI = *TM.getRegisterInfo();
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bool *PhysRegsUsed = MF.getUsedPhysregs();
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// LoadedRegs - Keep track of which vregs are loaded, so that we only load
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// LoadedRegs - Keep track of which vregs are loaded, so that we only load
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// each vreg once (in the case where a spilled vreg is used by multiple
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// each vreg once (in the case where a spilled vreg is used by multiple
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@@ -177,6 +178,7 @@ bool SimpleSpiller::runOnMachineFunction(MachineFunction& MF,
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++NumStores;
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++NumStores;
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}
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}
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}
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}
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PhysRegsUsed[PhysReg] = true;
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MI.SetMachineOperandReg(i, PhysReg);
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MI.SetMachineOperandReg(i, PhysReg);
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}
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}
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}
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}
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@@ -296,6 +298,8 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
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// same stack slot, the original store is deleted.
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// same stack slot, the original store is deleted.
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std::map<int, MachineInstr*> MaybeDeadStores;
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std::map<int, MachineInstr*> MaybeDeadStores;
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bool *PhysRegsUsed = MBB.getParent()->getUsedPhysregs();
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for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
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for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
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MII != E; ) {
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MII != E; ) {
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MachineInstr &MI = *MII;
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MachineInstr &MI = *MII;
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@@ -313,7 +317,9 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
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if (!VRM.hasStackSlot(VirtReg)) {
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if (!VRM.hasStackSlot(VirtReg)) {
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// This virtual register was assigned a physreg!
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// This virtual register was assigned a physreg!
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MI.SetMachineOperandReg(i, VRM.getPhys(VirtReg));
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unsigned Phys = VRM.getPhys(VirtReg);
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PhysRegsUsed[Phys] = true;
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MI.SetMachineOperandReg(i, Phys);
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} else {
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} else {
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// Is this virtual register a spilled value?
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// Is this virtual register a spilled value?
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if (MO.isUse()) {
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if (MO.isUse()) {
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@@ -397,7 +403,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
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}
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}
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}
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}
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ContinueReload:
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ContinueReload:
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PhysRegsUsed[PhysReg] = true;
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MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot);
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MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot);
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// This invalidates PhysReg.
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// This invalidates PhysReg.
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ClobberPhysReg(PhysReg, SpillSlotsAvailable, PhysRegsAvailable);
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ClobberPhysReg(PhysReg, SpillSlotsAvailable, PhysRegsAvailable);
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@@ -429,9 +435,11 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
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// Loop over all of the implicit defs, clearing them from our available
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// Loop over all of the implicit defs, clearing them from our available
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// sets.
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// sets.
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const TargetInstrDescriptor &InstrDesc = TII->get(MI.getOpcode());
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for (const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode());
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for (const unsigned* ImpDef = InstrDesc.ImplicitDefs; *ImpDef; ++ImpDef)
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*ImpDef; ++ImpDef) {
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PhysRegsUsed[*ImpDef] = true;
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ClobberPhysReg(*ImpDef, SpillSlotsAvailable, PhysRegsAvailable);
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ClobberPhysReg(*ImpDef, SpillSlotsAvailable, PhysRegsAvailable);
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}
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DEBUG(std::cerr << '\t' << MI);
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DEBUG(std::cerr << '\t' << MI);
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@@ -516,6 +524,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
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else
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else
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PhysReg = MO.getReg();
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PhysReg = MO.getReg();
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PhysRegsUsed[PhysReg] = true;
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MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot);
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MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot);
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DEBUG(std::cerr << "Store:\t" << *next(MII));
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DEBUG(std::cerr << "Store:\t" << *next(MII));
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MI.SetMachineOperandReg(i, PhysReg);
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MI.SetMachineOperandReg(i, PhysReg);
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