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Fix an over-constrained assertion in MachineFunction::addLiveIn.
The assertion was checking that the virtual register VReg used to represent the physical register PReg uses the same register class as the one passed to MachineFunction::addLiveIn. This is over-constraining because it is sufficient to check that the register class of VReg (VRegRC) is a subclass of the register class of PReg (PRegRC) and that VRegRC contains PReg. Indeed, if VReg gets constrained because of some operation constraints between two calls of MachineFunction::addLiveIn, the original assertion cannot match. This fixes <rdar://problem/15633429>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197097 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -425,7 +425,16 @@ unsigned MachineFunction::addLiveIn(unsigned PReg,
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MachineRegisterInfo &MRI = getRegInfo();
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unsigned VReg = MRI.getLiveInVirtReg(PReg);
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if (VReg) {
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assert(MRI.getRegClass(VReg) == RC && "Register class mismatch!");
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const TargetRegisterClass *VRegRC = MRI.getRegClass(VReg);
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(void)VRegRC;
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// A physical register can be added several times.
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// Between two calls, the register class of the related virtual register
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// may have been constrained to match some operation constraints.
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// In that case, check that the current register class includes the
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// physical register and is a sub class of the specified RC.
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assert((VRegRC == RC || (VRegRC->contains(PReg) &&
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RC->hasSubClassEq(VRegRC))) &&
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"Register class mismatch!");
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return VReg;
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}
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VReg = MRI.createVirtualRegister(RC);
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