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simplify some logic

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75079 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2009-07-09 00:32:12 +00:00
parent 9f44b3a411
commit b172b0b1ba
1 changed files with 15 additions and 13 deletions
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28
lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
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@ -590,24 +590,26 @@ void X86ATTAsmPrinter::printLeaMemReference(const MachineInstr *MI, unsigned Op,
const MachineOperand &IndexReg = MI->getOperand(Op+2); const MachineOperand &IndexReg = MI->getOperand(Op+2);
const MachineOperand &DispSpec = MI->getOperand(Op+3); const MachineOperand &DispSpec = MI->getOperand(Op+3);
if (DispSpec.isGlobal() ||
DispSpec.isCPI() ||
DispSpec.isJTI() ||
DispSpec.isSymbol()) {
printOperand(MI, Op+3, "mem");
} else {
int DispVal = DispSpec.getImm();
if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
O << DispVal;
}
// If we really don't want to print out (rip), don't. // If we really don't want to print out (rip), don't.
bool HasBaseReg = BaseReg.getReg() != 0; bool HasBaseReg = BaseReg.getReg() != 0;
if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") && if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") &&
BaseReg.getReg() == X86::RIP) BaseReg.getReg() == X86::RIP)
HasBaseReg = false; HasBaseReg = false;
if (IndexReg.getReg() || HasBaseReg) { // HasParenPart - True if we will print out the () part of the mem ref.
bool HasParenPart = IndexReg.getReg() || HasBaseReg;
if (DispSpec.isImm()) {
int DispVal = DispSpec.getImm();
if (DispVal || !HasParenPart)
O << DispVal;
} else {
assert(DispSpec.isGlobal() || DispSpec.isCPI() ||
DispSpec.isJTI() || DispSpec.isSymbol());
printOperand(MI, Op+3, "mem");
}
if (HasParenPart) {
assert(IndexReg.getReg() != X86::ESP && assert(IndexReg.getReg() != X86::ESP &&
"X86 doesn't allow scaling by ESP"); "X86 doesn't allow scaling by ESP");