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Codegen support for arbitrary vector getelementptrs.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167830 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands
2012-11-13 13:01:58 +00:00
parent 707276d415
commit b2df01ab2a
2 changed files with 8 additions and 3 deletions
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6
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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@@ -3137,12 +3137,12 @@ void SelectionDAGBuilder::visitGetElementPtr(const User &I) {
OI != E; ++OI) { OI != E; ++OI) {
const Value *Idx = *OI; const Value *Idx = *OI;
if (StructType *StTy = dyn_cast<StructType>(Ty)) { if (StructType *StTy = dyn_cast<StructType>(Ty)) {
unsigned Field = cast<ConstantInt>(Idx)->getZExtValue(); unsigned Field = cast<Constant>(Idx)->getUniqueInteger().getZExtValue();
if (Field) { if (Field) {
// N = N + Offset // N = N + Offset
uint64_t Offset = TD->getStructLayout(StTy)->getElementOffset(Field); uint64_t Offset = TD->getStructLayout(StTy)->getElementOffset(Field);
N = DAG.getNode(ISD::ADD, getCurDebugLoc(), N.getValueType(), N, N = DAG.getNode(ISD::ADD, getCurDebugLoc(), N.getValueType(), N,
DAG.getIntPtrConstant(Offset)); DAG.getConstant(Offset, N.getValueType()));
} }
Ty = StTy->getElementType(Field); Ty = StTy->getElementType(Field);
@@ -3187,7 +3187,7 @@ void SelectionDAGBuilder::visitGetElementPtr(const User &I) {
N.getValueType(), IdxN, N.getValueType(), IdxN,
DAG.getConstant(Amt, IdxN.getValueType())); DAG.getConstant(Amt, IdxN.getValueType()));
} else { } else {
SDValue Scale = DAG.getConstant(ElementSize, TLI.getPointerTy()); SDValue Scale = DAG.getConstant(ElementSize, IdxN.getValueType());
IdxN = DAG.getNode(ISD::MUL, getCurDebugLoc(), IdxN = DAG.getNode(ISD::MUL, getCurDebugLoc(),
N.getValueType(), IdxN, Scale); N.getValueType(), IdxN, Scale);
} }

5
test/CodeGen/Generic/vector.ll
View File

@@ -152,3 +152,8 @@ define void @splat_i4(%i4* %P, %i4* %Q, i32 %X) {
store %i4 %R, %i4* %P store %i4 %R, %i4* %P
ret void ret void
} }
define <2 x i32*> @vector_gep(<2 x [3 x {i32, i32}]*> %a) {
%w = getelementptr <2 x [3 x {i32, i32}]*> %a, <2 x i32> <i32 1, i32 2>, <2 x i32> <i32 2, i32 3>, <2 x i32> <i32 1, i32 1>
ret <2 x i32*> %w
}