mirror of
https://github.com/c64scene-ar/llvm-6502.git
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[ARM64] Remove ARM64SYS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205870 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bradley Smith
parent
96e05ca4bf
commit
b336e5d041
@ -279,671 +279,6 @@ inline static unsigned getNZCVToSatisfyCondCode(CondCode Code) {
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}
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} // end namespace ARM64CC
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namespace ARM64SYS {
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enum BarrierOption {
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InvalidBarrier = 0xff,
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OSHLD = 0x1,
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OSHST = 0x2,
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OSH = 0x3,
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NSHLD = 0x5,
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NSHST = 0x6,
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NSH = 0x7,
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ISHLD = 0x9,
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ISHST = 0xa,
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ISH = 0xb,
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LD = 0xd,
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ST = 0xe,
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SY = 0xf
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};
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inline static const char *getBarrierOptName(BarrierOption Opt) {
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switch (Opt) {
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default: return NULL;
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case 0x1: return "oshld";
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case 0x2: return "oshst";
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case 0x3: return "osh";
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case 0x5: return "nshld";
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case 0x6: return "nshst";
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case 0x7: return "nsh";
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case 0x9: return "ishld";
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case 0xa: return "ishst";
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case 0xb: return "ish";
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case 0xd: return "ld";
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case 0xe: return "st";
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case 0xf: return "sy";
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}
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}
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#define A64_SYSREG_ENC(op0,CRn,op2,CRm,op1) ((op0) << 14 | (op1) << 11 | \
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(CRn) << 7 | (CRm) << 3 | (op2))
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enum SystemRegister {
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InvalidSystemReg = 0,
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// Table in section 3.10.3
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SPSR_EL1 = 0xc200,
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SPSR_svc = SPSR_EL1,
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ELR_EL1 = 0xc201,
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SP_EL0 = 0xc208,
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SPSel = 0xc210,
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CurrentEL = 0xc212,
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DAIF = 0xda11,
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NZCV = 0xda10,
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FPCR = 0xda20,
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FPSR = 0xda21,
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DSPSR = 0xda28,
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DLR = 0xda29,
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SPSR_EL2 = 0xe200,
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SPSR_hyp = SPSR_EL2,
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ELR_EL2 = 0xe201,
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SP_EL1 = 0xe208,
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SPSR_irq = 0xe218,
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SPSR_abt = 0xe219,
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SPSR_und = 0xe21a,
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SPSR_fiq = 0xe21b,
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SPSR_EL3 = 0xf200,
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ELR_EL3 = 0xf201,
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SP_EL2 = 0xf208,
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// Table in section 3.10.8
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MIDR_EL1 = 0xc000,
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CTR_EL0 = 0xd801,
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MPIDR_EL1 = 0xc005,
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ECOIDR_EL1 = 0xc006,
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DCZID_EL0 = 0xd807,
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MVFR0_EL1 = 0xc018,
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MVFR1_EL1 = 0xc019,
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ID_AA64PFR0_EL1 = 0xc020,
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ID_AA64PFR1_EL1 = 0xc021,
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ID_AA64DFR0_EL1 = 0xc028,
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ID_AA64DFR1_EL1 = 0xc029,
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ID_AA64ISAR0_EL1 = 0xc030,
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ID_AA64ISAR1_EL1 = 0xc031,
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ID_AA64MMFR0_EL1 = 0xc038,
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ID_AA64MMFR1_EL1 = 0xc039,
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CCSIDR_EL1 = 0xc800,
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CLIDR_EL1 = 0xc801,
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AIDR_EL1 = 0xc807,
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CSSELR_EL1 = 0xd000,
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VPIDR_EL2 = 0xe000,
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VMPIDR_EL2 = 0xe005,
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SCTLR_EL1 = 0xc080,
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SCTLR_EL2 = 0xe080,
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SCTLR_EL3 = 0xf080,
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ACTLR_EL1 = 0xc081,
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ACTLR_EL2 = 0xe081,
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ACTLR_EL3 = 0xf081,
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CPACR_EL1 = 0xc082,
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CPTR_EL2 = 0xe08a,
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CPTR_EL3 = 0xf08a,
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SCR_EL3 = 0xf088,
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HCR_EL2 = 0xe088,
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MDCR_EL2 = 0xe089,
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MDCR_EL3 = 0xf099,
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HSTR_EL2 = 0xe08b,
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HACR_EL2 = 0xe08f,
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TTBR0_EL1 = 0xc100,
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TTBR1_EL1 = 0xc101,
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TTBR0_EL2 = 0xe100,
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TTBR0_EL3 = 0xf100,
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VTTBR_EL2 = 0xe108,
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TCR_EL1 = 0xc102,
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TCR_EL2 = 0xe102,
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TCR_EL3 = 0xf102,
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VTCR_EL2 = 0xe10a,
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ADFSR_EL1 = 0xc288,
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AIFSR_EL1 = 0xc289,
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ADFSR_EL2 = 0xe288,
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AIFSR_EL2 = 0xe289,
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ADFSR_EL3 = 0xf288,
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AIFSR_EL3 = 0xf289,
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ESR_EL1 = 0xc290,
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ESR_EL2 = 0xe290,
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ESR_EL3 = 0xf290,
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FAR_EL1 = 0xc300,
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FAR_EL2 = 0xe300,
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FAR_EL3 = 0xf300,
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HPFAR_EL2 = 0xe304,
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PAR_EL1 = 0xc3a0,
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MAIR_EL1 = 0xc510,
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MAIR_EL2 = 0xe510,
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MAIR_EL3 = 0xf510,
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AMAIR_EL1 = 0xc518,
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AMAIR_EL2 = 0xe518,
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AMAIR_EL3 = 0xf518,
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VBAR_EL1 = 0xc600,
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VBAR_EL2 = 0xe600,
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VBAR_EL3 = 0xf600,
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RVBAR_EL1 = 0xc601,
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RVBAR_EL2 = 0xe601,
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RVBAR_EL3 = 0xf601,
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ISR_EL1 = 0xc608,
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CONTEXTIDR_EL1 = 0xc681,
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TPIDR_EL0 = 0xde82,
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TPIDRRO_EL0 = 0xde83,
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TPIDR_EL1 = 0xc684,
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TPIDR_EL2 = 0xe682,
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TPIDR_EL3 = 0xf682,
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TEECR32_EL1 = 0x9000,
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CNTFRQ_EL0 = 0xdf00,
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CNTPCT_EL0 = 0xdf01,
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CNTVCT_EL0 = 0xdf02,
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CNTVOFF_EL2 = 0xe703,
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CNTKCTL_EL1 = 0xc708,
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CNTHCTL_EL2 = 0xe708,
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CNTP_TVAL_EL0 = 0xdf10,
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CNTP_CTL_EL0 = 0xdf11,
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CNTP_CVAL_EL0 = 0xdf12,
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CNTV_TVAL_EL0 = 0xdf18,
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CNTV_CTL_EL0 = 0xdf19,
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CNTV_CVAL_EL0 = 0xdf1a,
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CNTHP_TVAL_EL2 = 0xe710,
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CNTHP_CTL_EL2 = 0xe711,
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CNTHP_CVAL_EL2 = 0xe712,
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CNTPS_TVAL_EL1 = 0xff10,
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CNTPS_CTL_EL1 = 0xff11,
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CNTPS_CVAL_EL1= 0xff12,
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PMEVCNTR0_EL0 = 0xdf40,
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PMEVCNTR1_EL0 = 0xdf41,
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PMEVCNTR2_EL0 = 0xdf42,
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PMEVCNTR3_EL0 = 0xdf43,
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PMEVCNTR4_EL0 = 0xdf44,
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PMEVCNTR5_EL0 = 0xdf45,
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PMEVCNTR6_EL0 = 0xdf46,
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PMEVCNTR7_EL0 = 0xdf47,
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PMEVCNTR8_EL0 = 0xdf48,
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PMEVCNTR9_EL0 = 0xdf49,
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PMEVCNTR10_EL0 = 0xdf4a,
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PMEVCNTR11_EL0 = 0xdf4b,
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PMEVCNTR12_EL0 = 0xdf4c,
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PMEVCNTR13_EL0 = 0xdf4d,
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PMEVCNTR14_EL0 = 0xdf4e,
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PMEVCNTR15_EL0 = 0xdf4f,
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PMEVCNTR16_EL0 = 0xdf50,
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PMEVCNTR17_EL0 = 0xdf51,
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PMEVCNTR18_EL0 = 0xdf52,
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PMEVCNTR19_EL0 = 0xdf53,
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PMEVCNTR20_EL0 = 0xdf54,
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PMEVCNTR21_EL0 = 0xdf55,
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PMEVCNTR22_EL0 = 0xdf56,
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PMEVCNTR23_EL0 = 0xdf57,
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PMEVCNTR24_EL0 = 0xdf58,
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PMEVCNTR25_EL0 = 0xdf59,
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PMEVCNTR26_EL0 = 0xdf5a,
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PMEVCNTR27_EL0 = 0xdf5b,
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PMEVCNTR28_EL0 = 0xdf5c,
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PMEVCNTR29_EL0 = 0xdf5d,
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PMEVCNTR30_EL0 = 0xdf5e,
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PMEVTYPER0_EL0 = 0xdf60,
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PMEVTYPER1_EL0 = 0xdf61,
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PMEVTYPER2_EL0 = 0xdf62,
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PMEVTYPER3_EL0 = 0xdf63,
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PMEVTYPER4_EL0 = 0xdf64,
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PMEVTYPER5_EL0 = 0xdf65,
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PMEVTYPER6_EL0 = 0xdf66,
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PMEVTYPER7_EL0 = 0xdf67,
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PMEVTYPER8_EL0 = 0xdf68,
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PMEVTYPER9_EL0 = 0xdf69,
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PMEVTYPER10_EL0 = 0xdf6a,
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PMEVTYPER11_EL0 = 0xdf6b,
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PMEVTYPER12_EL0 = 0xdf6c,
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PMEVTYPER13_EL0 = 0xdf6d,
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PMEVTYPER14_EL0 = 0xdf6e,
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PMEVTYPER15_EL0 = 0xdf6f,
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PMEVTYPER16_EL0 = 0xdf70,
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PMEVTYPER17_EL0 = 0xdf71,
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PMEVTYPER18_EL0 = 0xdf72,
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PMEVTYPER19_EL0 = 0xdf73,
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PMEVTYPER20_EL0 = 0xdf74,
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PMEVTYPER21_EL0 = 0xdf75,
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PMEVTYPER22_EL0 = 0xdf76,
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PMEVTYPER23_EL0 = 0xdf77,
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PMEVTYPER24_EL0 = 0xdf78,
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PMEVTYPER25_EL0 = 0xdf79,
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PMEVTYPER26_EL0 = 0xdf7a,
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PMEVTYPER27_EL0 = 0xdf7b,
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PMEVTYPER28_EL0 = 0xdf7c,
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PMEVTYPER29_EL0 = 0xdf7d,
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PMEVTYPER30_EL0 = 0xdf7e,
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PMCCFILTR_EL0 = 0xdf7f,
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RMR_EL3 = 0xf602,
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RMR_EL2 = 0xd602,
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RMR_EL1 = 0xce02,
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// Debug Architecture 5.3, Table 17.
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MDCCSR_EL0 = A64_SYSREG_ENC(2, 0, 0, 1, 3),
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MDCCINT_EL1 = A64_SYSREG_ENC(2, 0, 0, 2, 0),
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DBGDTR_EL0 = A64_SYSREG_ENC(2, 0, 0, 4, 3),
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DBGDTRRX_EL0 = A64_SYSREG_ENC(2, 0, 0, 5, 3),
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DBGDTRTX_EL0 = DBGDTRRX_EL0,
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DBGVCR32_EL2 = A64_SYSREG_ENC(2, 0, 0, 7, 4),
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OSDTRRX_EL1 = A64_SYSREG_ENC(2, 0, 2, 0, 0),
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MDSCR_EL1 = A64_SYSREG_ENC(2, 0, 2, 2, 0),
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OSDTRTX_EL1 = A64_SYSREG_ENC(2, 0, 2, 3, 0),
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OSECCR_EL11 = A64_SYSREG_ENC(2, 0, 2, 6, 0),
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DBGBVR0_EL1 = A64_SYSREG_ENC(2, 0, 4, 0, 0),
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DBGBVR1_EL1 = A64_SYSREG_ENC(2, 0, 4, 1, 0),
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DBGBVR2_EL1 = A64_SYSREG_ENC(2, 0, 4, 2, 0),
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DBGBVR3_EL1 = A64_SYSREG_ENC(2, 0, 4, 3, 0),
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DBGBVR4_EL1 = A64_SYSREG_ENC(2, 0, 4, 4, 0),
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DBGBVR5_EL1 = A64_SYSREG_ENC(2, 0, 4, 5, 0),
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DBGBVR6_EL1 = A64_SYSREG_ENC(2, 0, 4, 6, 0),
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DBGBVR7_EL1 = A64_SYSREG_ENC(2, 0, 4, 7, 0),
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DBGBVR8_EL1 = A64_SYSREG_ENC(2, 0, 4, 8, 0),
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DBGBVR9_EL1 = A64_SYSREG_ENC(2, 0, 4, 9, 0),
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DBGBVR10_EL1 = A64_SYSREG_ENC(2, 0, 4, 10, 0),
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DBGBVR11_EL1 = A64_SYSREG_ENC(2, 0, 4, 11, 0),
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DBGBVR12_EL1 = A64_SYSREG_ENC(2, 0, 4, 12, 0),
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DBGBVR13_EL1 = A64_SYSREG_ENC(2, 0, 4, 13, 0),
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DBGBVR14_EL1 = A64_SYSREG_ENC(2, 0, 4, 14, 0),
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DBGBVR15_EL1 = A64_SYSREG_ENC(2, 0, 4, 15, 0),
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DBGBCR0_EL1 = A64_SYSREG_ENC(2, 0, 5, 0, 0),
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DBGBCR1_EL1 = A64_SYSREG_ENC(2, 0, 5, 1, 0),
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DBGBCR2_EL1 = A64_SYSREG_ENC(2, 0, 5, 2, 0),
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DBGBCR3_EL1 = A64_SYSREG_ENC(2, 0, 5, 3, 0),
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DBGBCR4_EL1 = A64_SYSREG_ENC(2, 0, 5, 4, 0),
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DBGBCR5_EL1 = A64_SYSREG_ENC(2, 0, 5, 5, 0),
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DBGBCR6_EL1 = A64_SYSREG_ENC(2, 0, 5, 6, 0),
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DBGBCR7_EL1 = A64_SYSREG_ENC(2, 0, 5, 7, 0),
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DBGBCR8_EL1 = A64_SYSREG_ENC(2, 0, 5, 8, 0),
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DBGBCR9_EL1 = A64_SYSREG_ENC(2, 0, 5, 9, 0),
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DBGBCR10_EL1 = A64_SYSREG_ENC(2, 0, 5, 10, 0),
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DBGBCR11_EL1 = A64_SYSREG_ENC(2, 0, 5, 11, 0),
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DBGBCR12_EL1 = A64_SYSREG_ENC(2, 0, 5, 12, 0),
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DBGBCR13_EL1 = A64_SYSREG_ENC(2, 0, 5, 13, 0),
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DBGBCR14_EL1 = A64_SYSREG_ENC(2, 0, 5, 14, 0),
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DBGBCR15_EL1 = A64_SYSREG_ENC(2, 0, 5, 15, 0),
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DBGWVR0_EL1 = A64_SYSREG_ENC(2, 0, 6, 0, 0),
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DBGWVR1_EL1 = A64_SYSREG_ENC(2, 0, 6, 1, 0),
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DBGWVR2_EL1 = A64_SYSREG_ENC(2, 0, 6, 2, 0),
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DBGWVR3_EL1 = A64_SYSREG_ENC(2, 0, 6, 3, 0),
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DBGWVR4_EL1 = A64_SYSREG_ENC(2, 0, 6, 4, 0),
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DBGWVR5_EL1 = A64_SYSREG_ENC(2, 0, 6, 5, 0),
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DBGWVR6_EL1 = A64_SYSREG_ENC(2, 0, 6, 6, 0),
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DBGWVR7_EL1 = A64_SYSREG_ENC(2, 0, 6, 7, 0),
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DBGWVR8_EL1 = A64_SYSREG_ENC(2, 0, 6, 8, 0),
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DBGWVR9_EL1 = A64_SYSREG_ENC(2, 0, 6, 9, 0),
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DBGWVR10_EL1 = A64_SYSREG_ENC(2, 0, 6, 10, 0),
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DBGWVR11_EL1 = A64_SYSREG_ENC(2, 0, 6, 11, 0),
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DBGWVR12_EL1 = A64_SYSREG_ENC(2, 0, 6, 12, 0),
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DBGWVR13_EL1 = A64_SYSREG_ENC(2, 0, 6, 13, 0),
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DBGWVR14_EL1 = A64_SYSREG_ENC(2, 0, 6, 14, 0),
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DBGWVR15_EL1 = A64_SYSREG_ENC(2, 0, 6, 15, 0),
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DBGWCR0_EL1 = A64_SYSREG_ENC(2, 0, 7, 0, 0),
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DBGWCR1_EL1 = A64_SYSREG_ENC(2, 0, 7, 1, 0),
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DBGWCR2_EL1 = A64_SYSREG_ENC(2, 0, 7, 2, 0),
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DBGWCR3_EL1 = A64_SYSREG_ENC(2, 0, 7, 3, 0),
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DBGWCR4_EL1 = A64_SYSREG_ENC(2, 0, 7, 4, 0),
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DBGWCR5_EL1 = A64_SYSREG_ENC(2, 0, 7, 5, 0),
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DBGWCR6_EL1 = A64_SYSREG_ENC(2, 0, 7, 6, 0),
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DBGWCR7_EL1 = A64_SYSREG_ENC(2, 0, 7, 7, 0),
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DBGWCR8_EL1 = A64_SYSREG_ENC(2, 0, 7, 8, 0),
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DBGWCR9_EL1 = A64_SYSREG_ENC(2, 0, 7, 9, 0),
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DBGWCR10_EL1 = A64_SYSREG_ENC(2, 0, 7, 10, 0),
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DBGWCR11_EL1 = A64_SYSREG_ENC(2, 0, 7, 11, 0),
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DBGWCR12_EL1 = A64_SYSREG_ENC(2, 0, 7, 12, 0),
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DBGWCR13_EL1 = A64_SYSREG_ENC(2, 0, 7, 13, 0),
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DBGWCR14_EL1 = A64_SYSREG_ENC(2, 0, 7, 14, 0),
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DBGWCR15_EL1 = A64_SYSREG_ENC(2, 0, 7, 15, 0),
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MDRAR_EL1 = A64_SYSREG_ENC(2, 1, 0, 0, 0),
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OSLAR_EL1 = A64_SYSREG_ENC(2, 1, 4, 0, 0),
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OSLSR_EL1 = A64_SYSREG_ENC(2, 1, 4, 1, 0),
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OSDLR_EL1 = A64_SYSREG_ENC(2, 1, 4, 3, 0),
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DBGPRCR_EL1 = A64_SYSREG_ENC(2, 1, 4, 4, 0),
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DBGCLAIMSET_EL1 = A64_SYSREG_ENC(2, 7, 6, 8, 0),
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DBGCLAIMCLR_EL1 = A64_SYSREG_ENC(2, 7, 6, 9, 0),
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DBGAUTHSTATUS_EL1 = A64_SYSREG_ENC(2, 7, 6, 14, 0),
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DBGDEVID2 = A64_SYSREG_ENC(2, 7, 7, 0, 0),
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DBGDEVID1 = A64_SYSREG_ENC(2, 7, 7, 1, 0),
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DBGDEVID0 = A64_SYSREG_ENC(2, 7, 7, 2, 0),
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// The following registers are defined to allow access from AArch64 to
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// registers which are only used in the AArch32 architecture.
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DACR32_EL2 = 0xe180,
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IFSR32_EL2 = 0xe281,
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TEEHBR32_EL1 = 0x9080,
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SDER32_EL3 = 0xf089,
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FPEXC32_EL2 = 0xe298,
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// Cyclone specific system registers
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CPM_IOACC_CTL_EL3 = 0xff90,
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||||
// Architectural system registers
|
||||
ID_PFR0_EL1 = 0xc008,
|
||||
ID_PFR1_EL1 = 0xc009,
|
||||
ID_DFR0_EL1 = 0xc00a,
|
||||
ID_AFR0_EL1 = 0xc00b,
|
||||
ID_ISAR0_EL1 = 0xc010,
|
||||
ID_ISAR1_EL1 = 0xc011,
|
||||
ID_ISAR2_EL1 = 0xc012,
|
||||
ID_ISAR3_EL1 = 0xc013,
|
||||
ID_ISAR4_EL1 = 0xc014,
|
||||
ID_ISAR5_EL1 = 0xc015,
|
||||
AFSR1_EL1 = 0xc289, // note same as old AIFSR_EL1
|
||||
AFSR0_EL1 = 0xc288, // note same as old ADFSR_EL1
|
||||
REVIDR_EL1 = 0xc006 // note same as old ECOIDR_EL1
|
||||
|
||||
};
|
||||
#undef A64_SYSREG_ENC
|
||||
|
||||
static inline const char *getSystemRegisterName(SystemRegister Reg) {
|
||||
switch(Reg) {
|
||||
default: return NULL; // Caller is responsible for handling invalid value.
|
||||
case SPSR_EL1: return "SPSR_EL1";
|
||||
case ELR_EL1: return "ELR_EL1";
|
||||
case SP_EL0: return "SP_EL0";
|
||||
case SPSel: return "SPSel";
|
||||
case DAIF: return "DAIF";
|
||||
case CurrentEL: return "CurrentEL";
|
||||
case NZCV: return "NZCV";
|
||||
case FPCR: return "FPCR";
|
||||
case FPSR: return "FPSR";
|
||||
case DSPSR: return "DSPSR";
|
||||
case DLR: return "DLR";
|
||||
case SPSR_EL2: return "SPSR_EL2";
|
||||
case ELR_EL2: return "ELR_EL2";
|
||||
case SP_EL1: return "SP_EL1";
|
||||
case SPSR_irq: return "SPSR_irq";
|
||||
case SPSR_abt: return "SPSR_abt";
|
||||
case SPSR_und: return "SPSR_und";
|
||||
case SPSR_fiq: return "SPSR_fiq";
|
||||
case SPSR_EL3: return "SPSR_EL3";
|
||||
case ELR_EL3: return "ELR_EL3";
|
||||
case SP_EL2: return "SP_EL2";
|
||||
case MIDR_EL1: return "MIDR_EL1";
|
||||
case CTR_EL0: return "CTR_EL0";
|
||||
case MPIDR_EL1: return "MPIDR_EL1";
|
||||
case DCZID_EL0: return "DCZID_EL0";
|
||||
case MVFR0_EL1: return "MVFR0_EL1";
|
||||
case MVFR1_EL1: return "MVFR1_EL1";
|
||||
case ID_AA64PFR0_EL1: return "ID_AA64PFR0_EL1";
|
||||
case ID_AA64PFR1_EL1: return "ID_AA64PFR1_EL1";
|
||||
case ID_AA64DFR0_EL1: return "ID_AA64DFR0_EL1";
|
||||
case ID_AA64DFR1_EL1: return "ID_AA64DFR1_EL1";
|
||||
case ID_AA64ISAR0_EL1: return "ID_AA64ISAR0_EL1";
|
||||
case ID_AA64ISAR1_EL1: return "ID_AA64ISAR1_EL1";
|
||||
case ID_AA64MMFR0_EL1: return "ID_AA64MMFR0_EL1";
|
||||
case ID_AA64MMFR1_EL1: return "ID_AA64MMFR1_EL1";
|
||||
case CCSIDR_EL1: return "CCSIDR_EL1";
|
||||
case CLIDR_EL1: return "CLIDR_EL1";
|
||||
case AIDR_EL1: return "AIDR_EL1";
|
||||
case CSSELR_EL1: return "CSSELR_EL1";
|
||||
case VPIDR_EL2: return "VPIDR_EL2";
|
||||
case VMPIDR_EL2: return "VMPIDR_EL2";
|
||||
case SCTLR_EL1: return "SCTLR_EL1";
|
||||
case SCTLR_EL2: return "SCTLR_EL2";
|
||||
case SCTLR_EL3: return "SCTLR_EL3";
|
||||
case ACTLR_EL1: return "ACTLR_EL1";
|
||||
case ACTLR_EL2: return "ACTLR_EL2";
|
||||
case ACTLR_EL3: return "ACTLR_EL3";
|
||||
case CPACR_EL1: return "CPACR_EL1";
|
||||
case CPTR_EL2: return "CPTR_EL2";
|
||||
case CPTR_EL3: return "CPTR_EL3";
|
||||
case SCR_EL3: return "SCR_EL3";
|
||||
case HCR_EL2: return "HCR_EL2";
|
||||
case MDCR_EL2: return "MDCR_EL2";
|
||||
case MDCR_EL3: return "MDCR_EL3";
|
||||
case HSTR_EL2: return "HSTR_EL2";
|
||||
case HACR_EL2: return "HACR_EL2";
|
||||
case TTBR0_EL1: return "TTBR0_EL1";
|
||||
case TTBR1_EL1: return "TTBR1_EL1";
|
||||
case TTBR0_EL2: return "TTBR0_EL2";
|
||||
case TTBR0_EL3: return "TTBR0_EL3";
|
||||
case VTTBR_EL2: return "VTTBR_EL2";
|
||||
case TCR_EL1: return "TCR_EL1";
|
||||
case TCR_EL2: return "TCR_EL2";
|
||||
case TCR_EL3: return "TCR_EL3";
|
||||
case VTCR_EL2: return "VTCR_EL2";
|
||||
case ADFSR_EL2: return "ADFSR_EL2";
|
||||
case AIFSR_EL2: return "AIFSR_EL2";
|
||||
case ADFSR_EL3: return "ADFSR_EL3";
|
||||
case AIFSR_EL3: return "AIFSR_EL3";
|
||||
case ESR_EL1: return "ESR_EL1";
|
||||
case ESR_EL2: return "ESR_EL2";
|
||||
case ESR_EL3: return "ESR_EL3";
|
||||
case FAR_EL1: return "FAR_EL1";
|
||||
case FAR_EL2: return "FAR_EL2";
|
||||
case FAR_EL3: return "FAR_EL3";
|
||||
case HPFAR_EL2: return "HPFAR_EL2";
|
||||
case PAR_EL1: return "PAR_EL1";
|
||||
case MAIR_EL1: return "MAIR_EL1";
|
||||
case MAIR_EL2: return "MAIR_EL2";
|
||||
case MAIR_EL3: return "MAIR_EL3";
|
||||
case AMAIR_EL1: return "AMAIR_EL1";
|
||||
case AMAIR_EL2: return "AMAIR_EL2";
|
||||
case AMAIR_EL3: return "AMAIR_EL3";
|
||||
case VBAR_EL1: return "VBAR_EL1";
|
||||
case VBAR_EL2: return "VBAR_EL2";
|
||||
case VBAR_EL3: return "VBAR_EL3";
|
||||
case RVBAR_EL1: return "RVBAR_EL1";
|
||||
case RVBAR_EL2: return "RVBAR_EL2";
|
||||
case RVBAR_EL3: return "RVBAR_EL3";
|
||||
case ISR_EL1: return "ISR_EL1";
|
||||
case CONTEXTIDR_EL1: return "CONTEXTIDR_EL1";
|
||||
case TPIDR_EL0: return "TPIDR_EL0";
|
||||
case TPIDRRO_EL0: return "TPIDRRO_EL0";
|
||||
case TPIDR_EL1: return "TPIDR_EL1";
|
||||
case TPIDR_EL2: return "TPIDR_EL2";
|
||||
case TPIDR_EL3: return "TPIDR_EL3";
|
||||
case TEECR32_EL1: return "TEECR32_EL1";
|
||||
case CNTFRQ_EL0: return "CNTFRQ_EL0";
|
||||
case CNTPCT_EL0: return "CNTPCT_EL0";
|
||||
case CNTVCT_EL0: return "CNTVCT_EL0";
|
||||
case CNTVOFF_EL2: return "CNTVOFF_EL2";
|
||||
case CNTKCTL_EL1: return "CNTKCTL_EL1";
|
||||
case CNTHCTL_EL2: return "CNTHCTL_EL2";
|
||||
case CNTP_TVAL_EL0: return "CNTP_TVAL_EL0";
|
||||
case CNTP_CTL_EL0: return "CNTP_CTL_EL0";
|
||||
case CNTP_CVAL_EL0: return "CNTP_CVAL_EL0";
|
||||
case CNTV_TVAL_EL0: return "CNTV_TVAL_EL0";
|
||||
case CNTV_CTL_EL0: return "CNTV_CTL_EL0";
|
||||
case CNTV_CVAL_EL0: return "CNTV_CVAL_EL0";
|
||||
case CNTHP_TVAL_EL2: return "CNTHP_TVAL_EL2";
|
||||
case CNTHP_CTL_EL2: return "CNTHP_CTL_EL2";
|
||||
case CNTHP_CVAL_EL2: return "CNTHP_CVAL_EL2";
|
||||
case CNTPS_TVAL_EL1: return "CNTPS_TVAL_EL1";
|
||||
case CNTPS_CTL_EL1: return "CNTPS_CTL_EL1";
|
||||
case CNTPS_CVAL_EL1: return "CNTPS_CVAL_EL1";
|
||||
case DACR32_EL2: return "DACR32_EL2";
|
||||
case IFSR32_EL2: return "IFSR32_EL2";
|
||||
case TEEHBR32_EL1: return "TEEHBR32_EL1";
|
||||
case SDER32_EL3: return "SDER32_EL3";
|
||||
case FPEXC32_EL2: return "FPEXC32_EL2";
|
||||
case PMEVCNTR0_EL0: return "PMEVCNTR0_EL0";
|
||||
case PMEVCNTR1_EL0: return "PMEVCNTR1_EL0";
|
||||
case PMEVCNTR2_EL0: return "PMEVCNTR2_EL0";
|
||||
case PMEVCNTR3_EL0: return "PMEVCNTR3_EL0";
|
||||
case PMEVCNTR4_EL0: return "PMEVCNTR4_EL0";
|
||||
case PMEVCNTR5_EL0: return "PMEVCNTR5_EL0";
|
||||
case PMEVCNTR6_EL0: return "PMEVCNTR6_EL0";
|
||||
case PMEVCNTR7_EL0: return "PMEVCNTR7_EL0";
|
||||
case PMEVCNTR8_EL0: return "PMEVCNTR8_EL0";
|
||||
case PMEVCNTR9_EL0: return "PMEVCNTR9_EL0";
|
||||
case PMEVCNTR10_EL0: return "PMEVCNTR10_EL0";
|
||||
case PMEVCNTR11_EL0: return "PMEVCNTR11_EL0";
|
||||
case PMEVCNTR12_EL0: return "PMEVCNTR12_EL0";
|
||||
case PMEVCNTR13_EL0: return "PMEVCNTR13_EL0";
|
||||
case PMEVCNTR14_EL0: return "PMEVCNTR14_EL0";
|
||||
case PMEVCNTR15_EL0: return "PMEVCNTR15_EL0";
|
||||
case PMEVCNTR16_EL0: return "PMEVCNTR16_EL0";
|
||||
case PMEVCNTR17_EL0: return "PMEVCNTR17_EL0";
|
||||
case PMEVCNTR18_EL0: return "PMEVCNTR18_EL0";
|
||||
case PMEVCNTR19_EL0: return "PMEVCNTR19_EL0";
|
||||
case PMEVCNTR20_EL0: return "PMEVCNTR20_EL0";
|
||||
case PMEVCNTR21_EL0: return "PMEVCNTR21_EL0";
|
||||
case PMEVCNTR22_EL0: return "PMEVCNTR22_EL0";
|
||||
case PMEVCNTR23_EL0: return "PMEVCNTR23_EL0";
|
||||
case PMEVCNTR24_EL0: return "PMEVCNTR24_EL0";
|
||||
case PMEVCNTR25_EL0: return "PMEVCNTR25_EL0";
|
||||
case PMEVCNTR26_EL0: return "PMEVCNTR26_EL0";
|
||||
case PMEVCNTR27_EL0: return "PMEVCNTR27_EL0";
|
||||
case PMEVCNTR28_EL0: return "PMEVCNTR28_EL0";
|
||||
case PMEVCNTR29_EL0: return "PMEVCNTR29_EL0";
|
||||
case PMEVCNTR30_EL0: return "PMEVCNTR30_EL0";
|
||||
case PMEVTYPER0_EL0: return "PMEVTYPER0_EL0";
|
||||
case PMEVTYPER1_EL0: return "PMEVTYPER1_EL0";
|
||||
case PMEVTYPER2_EL0: return "PMEVTYPER2_EL0";
|
||||
case PMEVTYPER3_EL0: return "PMEVTYPER3_EL0";
|
||||
case PMEVTYPER4_EL0: return "PMEVTYPER4_EL0";
|
||||
case PMEVTYPER5_EL0: return "PMEVTYPER5_EL0";
|
||||
case PMEVTYPER6_EL0: return "PMEVTYPER6_EL0";
|
||||
case PMEVTYPER7_EL0: return "PMEVTYPER7_EL0";
|
||||
case PMEVTYPER8_EL0: return "PMEVTYPER8_EL0";
|
||||
case PMEVTYPER9_EL0: return "PMEVTYPER9_EL0";
|
||||
case PMEVTYPER10_EL0: return "PMEVTYPER10_EL0";
|
||||
case PMEVTYPER11_EL0: return "PMEVTYPER11_EL0";
|
||||
case PMEVTYPER12_EL0: return "PMEVTYPER12_EL0";
|
||||
case PMEVTYPER13_EL0: return "PMEVTYPER13_EL0";
|
||||
case PMEVTYPER14_EL0: return "PMEVTYPER14_EL0";
|
||||
case PMEVTYPER15_EL0: return "PMEVTYPER15_EL0";
|
||||
case PMEVTYPER16_EL0: return "PMEVTYPER16_EL0";
|
||||
case PMEVTYPER17_EL0: return "PMEVTYPER17_EL0";
|
||||
case PMEVTYPER18_EL0: return "PMEVTYPER18_EL0";
|
||||
case PMEVTYPER19_EL0: return "PMEVTYPER19_EL0";
|
||||
case PMEVTYPER20_EL0: return "PMEVTYPER20_EL0";
|
||||
case PMEVTYPER21_EL0: return "PMEVTYPER21_EL0";
|
||||
case PMEVTYPER22_EL0: return "PMEVTYPER22_EL0";
|
||||
case PMEVTYPER23_EL0: return "PMEVTYPER23_EL0";
|
||||
case PMEVTYPER24_EL0: return "PMEVTYPER24_EL0";
|
||||
case PMEVTYPER25_EL0: return "PMEVTYPER25_EL0";
|
||||
case PMEVTYPER26_EL0: return "PMEVTYPER26_EL0";
|
||||
case PMEVTYPER27_EL0: return "PMEVTYPER27_EL0";
|
||||
case PMEVTYPER28_EL0: return "PMEVTYPER28_EL0";
|
||||
case PMEVTYPER29_EL0: return "PMEVTYPER29_EL0";
|
||||
case PMEVTYPER30_EL0: return "PMEVTYPER30_EL0";
|
||||
case PMCCFILTR_EL0: return "PMCCFILTR_EL0";
|
||||
case RMR_EL3: return "RMR_EL3";
|
||||
case RMR_EL2: return "RMR_EL2";
|
||||
case RMR_EL1: return "RMR_EL1";
|
||||
case CPM_IOACC_CTL_EL3: return "CPM_IOACC_CTL_EL3";
|
||||
case MDCCSR_EL0: return "MDCCSR_EL0";
|
||||
case MDCCINT_EL1: return "MDCCINT_EL1";
|
||||
case DBGDTR_EL0: return "DBGDTR_EL0";
|
||||
case DBGDTRRX_EL0: return "DBGDTRRX_EL0";
|
||||
case DBGVCR32_EL2: return "DBGVCR32_EL2";
|
||||
case OSDTRRX_EL1: return "OSDTRRX_EL1";
|
||||
case MDSCR_EL1: return "MDSCR_EL1";
|
||||
case OSDTRTX_EL1: return "OSDTRTX_EL1";
|
||||
case OSECCR_EL11: return "OSECCR_EL11";
|
||||
case DBGBVR0_EL1: return "DBGBVR0_EL1";
|
||||
case DBGBVR1_EL1: return "DBGBVR1_EL1";
|
||||
case DBGBVR2_EL1: return "DBGBVR2_EL1";
|
||||
case DBGBVR3_EL1: return "DBGBVR3_EL1";
|
||||
case DBGBVR4_EL1: return "DBGBVR4_EL1";
|
||||
case DBGBVR5_EL1: return "DBGBVR5_EL1";
|
||||
case DBGBVR6_EL1: return "DBGBVR6_EL1";
|
||||
case DBGBVR7_EL1: return "DBGBVR7_EL1";
|
||||
case DBGBVR8_EL1: return "DBGBVR8_EL1";
|
||||
case DBGBVR9_EL1: return "DBGBVR9_EL1";
|
||||
case DBGBVR10_EL1: return "DBGBVR10_EL1";
|
||||
case DBGBVR11_EL1: return "DBGBVR11_EL1";
|
||||
case DBGBVR12_EL1: return "DBGBVR12_EL1";
|
||||
case DBGBVR13_EL1: return "DBGBVR13_EL1";
|
||||
case DBGBVR14_EL1: return "DBGBVR14_EL1";
|
||||
case DBGBVR15_EL1: return "DBGBVR15_EL1";
|
||||
case DBGBCR0_EL1: return "DBGBCR0_EL1";
|
||||
case DBGBCR1_EL1: return "DBGBCR1_EL1";
|
||||
case DBGBCR2_EL1: return "DBGBCR2_EL1";
|
||||
case DBGBCR3_EL1: return "DBGBCR3_EL1";
|
||||
case DBGBCR4_EL1: return "DBGBCR4_EL1";
|
||||
case DBGBCR5_EL1: return "DBGBCR5_EL1";
|
||||
case DBGBCR6_EL1: return "DBGBCR6_EL1";
|
||||
case DBGBCR7_EL1: return "DBGBCR7_EL1";
|
||||
case DBGBCR8_EL1: return "DBGBCR8_EL1";
|
||||
case DBGBCR9_EL1: return "DBGBCR9_EL1";
|
||||
case DBGBCR10_EL1: return "DBGBCR10_EL1";
|
||||
case DBGBCR11_EL1: return "DBGBCR11_EL1";
|
||||
case DBGBCR12_EL1: return "DBGBCR12_EL1";
|
||||
case DBGBCR13_EL1: return "DBGBCR13_EL1";
|
||||
case DBGBCR14_EL1: return "DBGBCR14_EL1";
|
||||
case DBGBCR15_EL1: return "DBGBCR15_EL1";
|
||||
case DBGWVR0_EL1: return "DBGWVR0_EL1";
|
||||
case DBGWVR1_EL1: return "DBGWVR1_EL1";
|
||||
case DBGWVR2_EL1: return "DBGWVR2_EL1";
|
||||
case DBGWVR3_EL1: return "DBGWVR3_EL1";
|
||||
case DBGWVR4_EL1: return "DBGWVR4_EL1";
|
||||
case DBGWVR5_EL1: return "DBGWVR5_EL1";
|
||||
case DBGWVR6_EL1: return "DBGWVR6_EL1";
|
||||
case DBGWVR7_EL1: return "DBGWVR7_EL1";
|
||||
case DBGWVR8_EL1: return "DBGWVR8_EL1";
|
||||
case DBGWVR9_EL1: return "DBGWVR9_EL1";
|
||||
case DBGWVR10_EL1: return "DBGWVR10_EL1";
|
||||
case DBGWVR11_EL1: return "DBGWVR11_EL1";
|
||||
case DBGWVR12_EL1: return "DBGWVR12_EL1";
|
||||
case DBGWVR13_EL1: return "DBGWVR13_EL1";
|
||||
case DBGWVR14_EL1: return "DBGWVR14_EL1";
|
||||
case DBGWVR15_EL1: return "DBGWVR15_EL1";
|
||||
case DBGWCR0_EL1: return "DBGWCR0_EL1";
|
||||
case DBGWCR1_EL1: return "DBGWCR1_EL1";
|
||||
case DBGWCR2_EL1: return "DBGWCR2_EL1";
|
||||
case DBGWCR3_EL1: return "DBGWCR3_EL1";
|
||||
case DBGWCR4_EL1: return "DBGWCR4_EL1";
|
||||
case DBGWCR5_EL1: return "DBGWCR5_EL1";
|
||||
case DBGWCR6_EL1: return "DBGWCR6_EL1";
|
||||
case DBGWCR7_EL1: return "DBGWCR7_EL1";
|
||||
case DBGWCR8_EL1: return "DBGWCR8_EL1";
|
||||
case DBGWCR9_EL1: return "DBGWCR9_EL1";
|
||||
case DBGWCR10_EL1: return "DBGWCR10_EL1";
|
||||
case DBGWCR11_EL1: return "DBGWCR11_EL1";
|
||||
case DBGWCR12_EL1: return "DBGWCR12_EL1";
|
||||
case DBGWCR13_EL1: return "DBGWCR13_EL1";
|
||||
case DBGWCR14_EL1: return "DBGWCR14_EL1";
|
||||
case DBGWCR15_EL1: return "DBGWCR15_EL1";
|
||||
case MDRAR_EL1: return "MDRAR_EL1";
|
||||
case OSLAR_EL1: return "OSLAR_EL1";
|
||||
case OSLSR_EL1: return "OSLSR_EL1";
|
||||
case OSDLR_EL1: return "OSDLR_EL1";
|
||||
case DBGPRCR_EL1: return "DBGPRCR_EL1";
|
||||
case DBGCLAIMSET_EL1: return "DBGCLAIMSET_EL1";
|
||||
case DBGCLAIMCLR_EL1: return "DBGCLAIMCLR_EL1";
|
||||
case DBGAUTHSTATUS_EL1: return "DBGAUTHSTATUS_EL1";
|
||||
case DBGDEVID2: return "DBGDEVID2";
|
||||
case DBGDEVID1: return "DBGDEVID1";
|
||||
case DBGDEVID0: return "DBGDEVID0";
|
||||
case ID_PFR0_EL1: return "ID_PFR0_EL1";
|
||||
case ID_PFR1_EL1: return "ID_PFR1_EL1";
|
||||
case ID_DFR0_EL1: return "ID_DFR0_EL1";
|
||||
case ID_AFR0_EL1: return "ID_AFR0_EL1";
|
||||
case ID_ISAR0_EL1: return "ID_ISAR0_EL1";
|
||||
case ID_ISAR1_EL1: return "ID_ISAR1_EL1";
|
||||
case ID_ISAR2_EL1: return "ID_ISAR2_EL1";
|
||||
case ID_ISAR3_EL1: return "ID_ISAR3_EL1";
|
||||
case ID_ISAR4_EL1: return "ID_ISAR4_EL1";
|
||||
case ID_ISAR5_EL1: return "ID_ISAR5_EL1";
|
||||
case AFSR1_EL1: return "AFSR1_EL1";
|
||||
case AFSR0_EL1: return "AFSR0_EL1";
|
||||
case REVIDR_EL1: return "REVIDR_EL1";
|
||||
}
|
||||
}
|
||||
|
||||
enum CPSRField {
|
||||
InvalidCPSRField = 0xff,
|
||||
cpsr_SPSel = 0x5,
|
||||
cpsr_DAIFSet = 0x1e,
|
||||
cpsr_DAIFClr = 0x1f
|
||||
};
|
||||
|
||||
static inline const char *getCPSRFieldName(CPSRField Val) {
|
||||
switch(Val) {
|
||||
default: assert(0 && "Invalid system register value!");
|
||||
case cpsr_SPSel: return "SPSel";
|
||||
case cpsr_DAIFSet: return "DAIFSet";
|
||||
case cpsr_DAIFClr: return "DAIFClr";
|
||||
}
|
||||
}
|
||||
|
||||
} // end namespace ARM64SYS
|
||||
|
||||
/// Instances of this class can perform bidirectional mapping from random
|
||||
/// identifier strings to operand encodings. For example "MSR" takes a named
|
||||
/// system-register which must be encoded somehow and decoded for printing. This
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user