diff --git a/lib/Analysis/LoopInfo.cpp b/lib/Analysis/LoopInfo.cpp index 1001d2b5460..735e31f2524 100644 --- a/lib/Analysis/LoopInfo.cpp +++ b/lib/Analysis/LoopInfo.cpp @@ -29,9 +29,9 @@ using namespace llvm; // Always verify loopinfo if expensive checking is enabled. #ifdef XDEBUG -bool VerifyLoopInfo = true; +static bool VerifyLoopInfo = true; #else -bool VerifyLoopInfo = false; +static bool VerifyLoopInfo = false; #endif static cl::opt VerifyLoopInfoX("verify-loop-info", cl::location(VerifyLoopInfo), diff --git a/lib/Analysis/ScalarEvolutionExpander.cpp b/lib/Analysis/ScalarEvolutionExpander.cpp index 1d1339078de..b90f0515a42 100644 --- a/lib/Analysis/ScalarEvolutionExpander.cpp +++ b/lib/Analysis/ScalarEvolutionExpander.cpp @@ -642,6 +642,8 @@ static const Loop *GetRelevantLoop(const SCEV *S, LoopInfo &LI, llvm_unreachable("Unexpected SCEV type!"); } +namespace { + /// LoopCompare - Compare loops by PickMostRelevantLoop. class LoopCompare { DominatorTree &DT; @@ -668,6 +670,8 @@ public: } }; +} + Value *SCEVExpander::visitAddExpr(const SCEVAddExpr *S) { const Type *Ty = SE.getEffectiveSCEVType(S->getType()); diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp index e9f074ea307..ff69f549425 100644 --- a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp @@ -1331,7 +1331,7 @@ DbgScope *DwarfDebug::getOrCreateAbstractScope(MDNode *N) { /// isSubprogramContext - Return true if Context is either a subprogram /// or another context nested inside a subprogram. -bool isSubprogramContext(MDNode *Context) { +static bool isSubprogramContext(MDNode *Context) { if (!Context) return false; DIDescriptor D(Context); diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index 19fb52c05d9..0b75c559827 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -351,8 +351,8 @@ void MachineVerifier::visitMachineFunctionBefore() { } // Does iterator point to a and b as the first two elements? -bool matchPair(MachineBasicBlock::const_succ_iterator i, - const MachineBasicBlock *a, const MachineBasicBlock *b) { +static bool matchPair(MachineBasicBlock::const_succ_iterator i, + const MachineBasicBlock *a, const MachineBasicBlock *b) { if (*i == a) return *++i == b; if (*i == b) diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index d320b658f6c..7a4a4f9a1ad 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -1881,6 +1881,7 @@ static unsigned IsPredicateKnownToFail(const unsigned char *Table, } } +namespace { struct MatchScope { /// FailIndex - If this match fails, this is the index to continue with. @@ -1902,6 +1903,8 @@ struct MatchScope { bool HasChainNodesMatched, HasFlagResultNodesMatched; }; +} + SDNode *SelectionDAGISel:: SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable, unsigned TableSize) { diff --git a/lib/Support/Debug.cpp b/lib/Support/Debug.cpp index eccfa0bd072..7f48f8aae71 100644 --- a/lib/Support/Debug.cpp +++ b/lib/Support/Debug.cpp @@ -51,12 +51,19 @@ DebugBufferSize("debug-buffer-size", cl::init(0)); static std::string CurrentDebugType; -static struct DebugOnlyOpt { + +namespace { + +struct DebugOnlyOpt { void operator=(const std::string &Val) const { DebugFlag |= !Val.empty(); CurrentDebugType = Val; } -} DebugOnlyOptLoc; +}; + +} + +static DebugOnlyOpt DebugOnlyOptLoc; static cl::opt > DebugOnly("debug-only", cl::desc("Enable a specific type of debug output"), diff --git a/lib/Support/Timer.cpp b/lib/Support/Timer.cpp index 4fac0737f0c..481f6ba5086 100644 --- a/lib/Support/Timer.cpp +++ b/lib/Support/Timer.cpp @@ -190,6 +190,8 @@ void TimeRecord::print(const TimeRecord &Total, raw_ostream &OS) const { // NamedRegionTimer Implementation //===----------------------------------------------------------------------===// +namespace { + typedef StringMap Name2TimerMap; class Name2PairMap { @@ -216,6 +218,8 @@ public: } }; +} + static ManagedStatic NamedTimers; static ManagedStatic NamedGroupedTimers; diff --git a/lib/System/DynamicLibrary.cpp b/lib/System/DynamicLibrary.cpp index ebc8acf3061..6f6890c06c4 100644 --- a/lib/System/DynamicLibrary.cpp +++ b/lib/System/DynamicLibrary.cpp @@ -24,12 +24,18 @@ // Collection of symbol name/value pairs to be searched prior to any libraries. static std::map *ExplicitSymbols = 0; -static struct ExplicitSymbolsDeleter { +namespace { + +struct ExplicitSymbolsDeleter { ~ExplicitSymbolsDeleter() { if (ExplicitSymbols) delete ExplicitSymbols; } -} Dummy; +}; + +} + +static ExplicitSymbolsDeleter Dummy; void llvm::sys::DynamicLibrary::AddSymbol(const char* symbolName, void *symbolValue) { diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/lib/Target/ARM/ARMBaseRegisterInfo.cpp index 264187594c7..5fb7e740a16 100644 --- a/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -40,7 +40,7 @@ #include "llvm/Support/CommandLine.h" using namespace llvm; -cl::opt +static cl::opt ReuseFrameIndexVals("arm-reuse-frame-index-vals", cl::Hidden, cl::init(true), cl::desc("Reuse repeated frame index values")); diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index 52d87cde803..b488af562c7 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -56,14 +56,14 @@ using namespace llvm; #define ALIGN_STACK 0 // FIXME (64-bit): Eventually enable by default. -cl::opt EnablePPC32RS("enable-ppc32-regscavenger", - cl::init(false), - cl::desc("Enable PPC32 register scavenger"), - cl::Hidden); -cl::opt EnablePPC64RS("enable-ppc64-regscavenger", - cl::init(false), - cl::desc("Enable PPC64 register scavenger"), - cl::Hidden); +static cl::opt EnablePPC32RS("enable-ppc32-regscavenger", + cl::init(false), + cl::desc("Enable PPC32 register scavenger"), + cl::Hidden); +static cl::opt EnablePPC64RS("enable-ppc64-regscavenger", + cl::init(false), + cl::desc("Enable PPC64 register scavenger"), + cl::Hidden); #define EnableRegisterScavenging \ ((EnablePPC32RS && !Subtarget.isPPC64()) || \ (EnablePPC64RS && Subtarget.isPPC64())) diff --git a/lib/Transforms/Scalar/GVN.cpp b/lib/Transforms/Scalar/GVN.cpp index 2c62815eb8b..321def7eb61 100644 --- a/lib/Transforms/Scalar/GVN.cpp +++ b/lib/Transforms/Scalar/GVN.cpp @@ -1217,7 +1217,7 @@ static Value *GetMemInstValueForLoad(MemIntrinsic *SrcInst, unsigned Offset, return ConstantFoldLoadFromConstPtr(Src, &TD); } - +namespace { struct AvailableValueInBlock { /// BB - The basic block in question. @@ -1291,6 +1291,8 @@ struct AvailableValueInBlock { } }; +} + /// ConstructSSAForLoadSet - Given a set of loads specified by ValuesPerBlock, /// construct SSA form, allowing us to eliminate LI. This returns the value /// that should be used at LI's definition site. diff --git a/lib/VMCore/Dominators.cpp b/lib/VMCore/Dominators.cpp index b014e69ee82..10a866fab62 100644 --- a/lib/VMCore/Dominators.cpp +++ b/lib/VMCore/Dominators.cpp @@ -30,9 +30,9 @@ using namespace llvm; // Always verify dominfo if expensive checking is enabled. #ifdef XDEBUG -bool VerifyDomInfo = true; +static bool VerifyDomInfo = true; #else -bool VerifyDomInfo = false; +static bool VerifyDomInfo = false; #endif static cl::opt VerifyDomInfoX("verify-dom-info", cl::location(VerifyDomInfo), diff --git a/lib/VMCore/LLVMContextImpl.cpp b/lib/VMCore/LLVMContextImpl.cpp index e71157f4402..9e41a081560 100644 --- a/lib/VMCore/LLVMContextImpl.cpp +++ b/lib/VMCore/LLVMContextImpl.cpp @@ -13,6 +13,7 @@ #include "LLVMContextImpl.h" #include +using namespace llvm; LLVMContextImpl::LLVMContextImpl(LLVMContext &C) : TheTrueVal(0), TheFalseVal(0), diff --git a/lib/VMCore/LeaksContext.h b/lib/VMCore/LeaksContext.h index abff090b879..b9e59d46b7a 100644 --- a/lib/VMCore/LeaksContext.h +++ b/lib/VMCore/LeaksContext.h @@ -14,7 +14,8 @@ #include "llvm/Value.h" #include "llvm/ADT/SmallPtrSet.h" -using namespace llvm; + +namespace llvm { template struct PrinterTrait { @@ -87,3 +88,5 @@ private: const T* Cache; const char* Name; }; + +} diff --git a/utils/TableGen/X86DisassemblerTables.cpp b/utils/TableGen/X86DisassemblerTables.cpp index be070317fc6..2176224523a 100644 --- a/utils/TableGen/X86DisassemblerTables.cpp +++ b/utils/TableGen/X86DisassemblerTables.cpp @@ -161,7 +161,7 @@ void DisassemblerTables::emitOneID(raw_ostream &o, /// @param i - The indentation level for that output stream. static void emitEmptyTable(raw_ostream &o, uint32_t &i) { - o.indent(i * 2) << "InstrUID modRMEmptyTable[1] = { 0 };" << "\n"; + o.indent(i * 2) << "static InstrUID modRMEmptyTable[1] = { 0 };" << "\n"; o << "\n"; } @@ -275,7 +275,7 @@ void DisassemblerTables::emitModRMDecision(raw_ostream &o1, return; } - o1.indent(i1) << "InstrUID modRMTable" << thisTableNumber; + o1.indent(i1) << "static InstrUID modRMTable" << thisTableNumber; switch (dt) { default: