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	Move TargetRegisterInfo::getSubReg() to MCRegisterInfo.
Allows us to de-virtualize the function and provides access to it in the instruction printer, which is useful for handling composite physical registers (e.g., ARM register lists). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151815 91177308-0d34-0410-b5e6-96231b3b80d8
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		| @@ -136,6 +136,9 @@ private: | ||||
|   const unsigned *Overlaps;                   // Pointer to the overlaps array | ||||
|   const unsigned *SubRegs;                    // Pointer to the subregs array | ||||
|   const unsigned *SuperRegs;                  // Pointer to the superregs array | ||||
|   const unsigned short *SubRegIndices;        // Pointer to the subreg lookup | ||||
|                                               // array. | ||||
|   unsigned NumSubRegIndices;                  // Number of subreg indices. | ||||
|   DenseMap<unsigned, int> L2DwarfRegs;        // LLVM to Dwarf regs mapping | ||||
|   DenseMap<unsigned, int> EHL2DwarfRegs;      // LLVM to Dwarf regs mapping EH | ||||
|   DenseMap<unsigned, unsigned> Dwarf2LRegs;   // Dwarf to LLVM regs mapping | ||||
| @@ -148,7 +151,9 @@ public: | ||||
|   void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR, unsigned RA, | ||||
|                           const MCRegisterClass *C, unsigned NC, | ||||
|                           const unsigned *O, const unsigned *Sub, | ||||
|                           const unsigned *Super) { | ||||
|                           const unsigned *Super, | ||||
|                           const unsigned short *SubIndices, | ||||
|                           unsigned NumIndices) { | ||||
|     Desc = D; | ||||
|     NumRegs = NR; | ||||
|     RAReg = RA; | ||||
| @@ -157,6 +162,8 @@ public: | ||||
|     SubRegs = Sub; | ||||
|     SuperRegs = Super; | ||||
|     NumClasses = NC; | ||||
|     SubRegIndices = SubIndices; | ||||
|     NumSubRegIndices = NumIndices; | ||||
|   } | ||||
|  | ||||
|   /// mapLLVMRegToDwarfReg - Used to initialize LLVM register to Dwarf | ||||
| @@ -234,6 +241,13 @@ public: | ||||
|     return SubRegs + get(RegNo).SubRegs; | ||||
|   } | ||||
|  | ||||
|   /// getSubReg - Returns the physical register number of sub-register "Index" | ||||
|   /// for physical register RegNo. Return zero if the sub-register does not | ||||
|   /// exist. | ||||
|   unsigned getSubReg(unsigned Reg, unsigned Idx) const { | ||||
|     return *(SubRegIndices + (Reg - 1) * NumSubRegIndices + Idx - 1); | ||||
|   } | ||||
|  | ||||
|   /// getSuperRegisters - Return the list of registers that are super-registers | ||||
|   /// of the specified register, or a null list of there are none. The list | ||||
|   /// returned is zero terminated and sorted according to super-sub register | ||||
|   | ||||
| @@ -383,11 +383,6 @@ public: | ||||
|   /// used by register scavenger to determine what registers are free. | ||||
|   virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0; | ||||
|  | ||||
|   /// getSubReg - Returns the physical register number of sub-register "Index" | ||||
|   /// for physical register RegNo. Return zero if the sub-register does not | ||||
|   /// exist. | ||||
|   virtual unsigned getSubReg(unsigned RegNo, unsigned Index) const = 0; | ||||
|  | ||||
|   /// getSubRegIndex - For a given register pair, return the sub-register index | ||||
|   /// if the second register is a sub-register of the first. Return zero | ||||
|   /// otherwise. | ||||
|   | ||||
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