We were (somehow) getting the wrong branch opcode for setcc float instrs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17925 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Brian Gaeke 2004-11-17 22:06:56 +00:00
parent 859804f529
commit b3e0017763
2 changed files with 4 additions and 4 deletions

View File

@ -1176,8 +1176,8 @@ void V8ISel::visitSetCondInst(SetCondInst &I) {
case Instruction::SetGE: BranchIdx = 5; break;
}
unsigned Column = 0;
if (Ty->isSigned()) ++Column;
if (Ty->isFloatingPoint()) ++Column;
if (Ty->isSigned() && !Ty->isFloatingPoint()) Column = 1;
if (Ty->isFloatingPoint()) Column = 2;
static unsigned OpcodeTab[3*6] = {
// LLVM SparcV8
// unsigned signed fp

View File

@ -1176,8 +1176,8 @@ void V8ISel::visitSetCondInst(SetCondInst &I) {
case Instruction::SetGE: BranchIdx = 5; break;
}
unsigned Column = 0;
if (Ty->isSigned()) ++Column;
if (Ty->isFloatingPoint()) ++Column;
if (Ty->isSigned() && !Ty->isFloatingPoint()) Column = 1;
if (Ty->isFloatingPoint()) Column = 2;
static unsigned OpcodeTab[3*6] = {
// LLVM SparcV8
// unsigned signed fp