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The asm parser currently selects the wrong encoding for non-conditional Thumb2 branches. However, this exposed a number of situations where the decoder was too permissive in allowing invalid instructions to decode successful. Specify additional fixed bits to close those gaps.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138910 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson
2011-08-31 22:00:41 +00:00
parent 08c2862540
commit b45b11bce1
2 changed files with 6 additions and 5 deletions
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8
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
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@@ -2603,17 +2603,17 @@ DecodeThumb2BCCInstruction(llvm::MCInst &Inst, unsigned Insn,
unsigned pred = fieldFromInstruction32(Insn, 22, 4);
if (pred == 0xE || pred == 0xF) {
unsigned opc = fieldFromInstruction32(Insn, 4, 2);
unsigned opc = fieldFromInstruction32(Insn, 4, 28);
switch (opc) {
default:
return Fail;
case 0:
case 0xf3bf8f4:
Inst.setOpcode(ARM::t2DSB);
break;
case 1:
case 0xf3bf8f5:
Inst.setOpcode(ARM::t2DMB);
break;
case 2:
case 0xf3bf8f6:
Inst.setOpcode(ARM::t2ISB);
return Success;
}