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Do not throw away alignment when generating the DAG for
memset; we may need it to decide between MOVAPS and MOVUPS later. Adjust a test that was looking for wrong code. PR 3866 / 8675131. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119605 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3487,7 +3487,7 @@ static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
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SDValue Store = DAG.getStore(Chain, dl, Value,
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getMemBasePlusOffset(Dst, DstOff, DAG),
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DstPtrInfo.getWithOffset(DstOff),
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isVol, false, 0);
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isVol, false, Align);
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OutChains.push_back(Store);
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DstOff += VTSize;
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}
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@ -1,4 +1,4 @@
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; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=nehalem | grep movaps | count 5
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; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=nehalem | grep movups | count 5
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; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=core2 | grep movl | count 20
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | grep movq | count 10
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15
test/CodeGen/X86/misaligned-memset.ll
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15
test/CodeGen/X86/misaligned-memset.ll
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@ -0,0 +1,15 @@
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; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=nehalem < %s | FileCheck %s
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@a = common global [3 x i64] zeroinitializer, align 16
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define i32 @main() nounwind ssp {
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; CHECK: movups
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entry:
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%retval = alloca i32, align 4
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store i32 0, i32* %retval
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call void @llvm.memset.p0i8.i64(i8* bitcast (i64* getelementptr inbounds ([3 x i64]* @a, i32 0, i64 1) to i8*), i8 0, i64 16, i32 1, i1 false)
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%0 = load i32* %retval
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ret i32 %0
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}
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
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