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Disable ARM partial flag dependency optimization at -Oz
To not over constrain the scheduler for ARM in thumb mode, some optimizations for code size reduction, specific to ARM thumb, are blocked when they add a dependency (like write after read dependency). Disables this check when code size is the priority, i.e., code is compiled with -Oz. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170462 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -22,6 +22,7 @@
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Function.h" // To access Function attributes
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using namespace llvm;
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STATISTIC(NumNarrows, "Number of 32-bit instrs reduced to 16-bit ones");
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@ -182,11 +183,14 @@ namespace {
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/// ReduceMBB - Reduce width of instructions in the specified basic block.
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bool ReduceMBB(MachineBasicBlock &MBB);
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bool MinimizeSize;
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};
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char Thumb2SizeReduce::ID = 0;
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}
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Thumb2SizeReduce::Thumb2SizeReduce() : MachineFunctionPass(ID) {
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MinimizeSize = false;
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for (unsigned i = 0, e = array_lengthof(ReduceTable); i != e; ++i) {
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unsigned FromOpc = ReduceTable[i].WideOpc;
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if (!ReduceOpcodeMap.insert(std::make_pair(FromOpc, i)).second)
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@ -221,8 +225,8 @@ static bool HasImplicitCPSRDef(const MCInstrDesc &MCID) {
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bool
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Thumb2SizeReduce::canAddPseudoFlagDep(MachineInstr *Def, MachineInstr *Use,
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bool FirstInSelfLoop) {
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// FIXME: Disable check for -Oz (aka OptimizeForSizeHarder).
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if (!STI->avoidCPSRPartialUpdate())
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// Disable the check for -Oz (aka OptimizeForSizeHarder).
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if (MinimizeSize || !STI->avoidCPSRPartialUpdate())
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return false;
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if (!Def)
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@ -942,6 +946,10 @@ bool Thumb2SizeReduce::runOnMachineFunction(MachineFunction &MF) {
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TII = static_cast<const Thumb2InstrInfo*>(TM.getInstrInfo());
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STI = &TM.getSubtarget<ARMSubtarget>();
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// When -Oz is set, the function carries MinSize attribute.
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MinimizeSize =
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MF.getFunction()->getFnAttributes().hasAttribute(Attributes::MinSize);
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bool Modified = false;
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for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
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Modified |= ReduceMBB(*I);
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@ -49,3 +49,37 @@ while.body:
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while.end:
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ret void
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}
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; Allow partial CPSR dependency when code size is the priority.
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; rdar://12878928
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define void @t3(i32* nocapture %ptr1, i32* %ptr2, i32 %c) nounwind minsize {
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entry:
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; CHECK: t3:
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%tobool7 = icmp eq i32* %ptr2, null
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br i1 %tobool7, label %while.end, label %while.body
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while.body:
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; CHECK: while.body
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; CHECK: mul r{{[0-9]+}}
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; CHECK: muls
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%ptr1.addr.09 = phi i32* [ %add.ptr, %while.body ], [ %ptr1, %entry ]
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%ptr2.addr.08 = phi i32* [ %incdec.ptr, %while.body ], [ %ptr2, %entry ]
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%0 = load i32* %ptr1.addr.09, align 4
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%arrayidx1 = getelementptr inbounds i32* %ptr1.addr.09, i32 1
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%1 = load i32* %arrayidx1, align 4
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%arrayidx3 = getelementptr inbounds i32* %ptr1.addr.09, i32 2
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%2 = load i32* %arrayidx3, align 4
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%arrayidx4 = getelementptr inbounds i32* %ptr1.addr.09, i32 3
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%3 = load i32* %arrayidx4, align 4
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%add.ptr = getelementptr inbounds i32* %ptr1.addr.09, i32 4
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%mul = mul i32 %1, %0
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%mul5 = mul i32 %mul, %2
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%mul6 = mul i32 %mul5, %3
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store i32 %mul6, i32* %ptr2.addr.08, align 4
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%incdec.ptr = getelementptr inbounds i32* %ptr2.addr.08, i32 -1
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%tobool = icmp eq i32* %incdec.ptr, null
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br i1 %tobool, label %while.end, label %while.body
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while.end:
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ret void
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}
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