6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-06-27 14:24:40 +00:00
Code Issues Projects Releases Wiki Activity

Revert "[InstCombine] Rephrase fix to SimplifyWithOpReplaced"

Browse Source 
This reverts commit r239141. This commit was an attempt to reintroduce
a previous patch that broke many self-hosting bots with clang timeouts,
but it still has slowdown issues, at least  on ARM, increasing the
compilation time (stage 2, clang's) by 5x.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239175 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Renato Golin
2015-06-05 18:24:12 +00:00
parent aa4466db93
commit b539fba9d7
2 changed files with 4 additions and 32 deletions
Download Patch File Download Diff File Expand all files Collapse all files

26
lib/Transforms/InstCombine/InstCombineSelect.cpp
View File

@ -598,24 +598,6 @@ Instruction *InstCombiner::visitSelectInstWithICmp(SelectInst &SI,
} }
} }
// Consider:
// %cmp = icmp eq i32 %x, 2147483647
// %add = add nsw i32 %x, 1
// %sel = select i1 %cmp, i32 -2147483648, i32 %add
//
// We can't replace %sel with %add unless we strip away the flags.
auto StripBinOpFlags = [](Value *V) {
if (auto *B = dyn_cast<BinaryOperator>(V)) {
if (isa<OverflowingBinaryOperator>(B)) {
B->setHasNoSignedWrap(false);
B->setHasNoUnsignedWrap(false);
}
if (isa<PossiblyExactOperator>(B))
B->setIsExact(false);
}
return V;
};
// If we have an equality comparison then we know the value in one of the // If we have an equality comparison then we know the value in one of the
// arms of the select. See if substituting this value into the arm and // arms of the select. See if substituting this value into the arm and
// simplifying the result yields the same value as the other arm. // simplifying the result yields the same value as the other arm.
@ -624,23 +606,23 @@ Instruction *InstCombiner::visitSelectInstWithICmp(SelectInst &SI,
TrueVal || TrueVal ||
SimplifyWithOpReplaced(FalseVal, CmpRHS, CmpLHS, TLI, DL, DT, AC) == SimplifyWithOpReplaced(FalseVal, CmpRHS, CmpLHS, TLI, DL, DT, AC) ==
TrueVal) TrueVal)
return ReplaceInstUsesWith(SI, StripBinOpFlags(FalseVal)); return ReplaceInstUsesWith(SI, FalseVal);
if (SimplifyWithOpReplaced(TrueVal, CmpLHS, CmpRHS, TLI, DL, DT, AC) == if (SimplifyWithOpReplaced(TrueVal, CmpLHS, CmpRHS, TLI, DL, DT, AC) ==
FalseVal || FalseVal ||
SimplifyWithOpReplaced(TrueVal, CmpRHS, CmpLHS, TLI, DL, DT, AC) == SimplifyWithOpReplaced(TrueVal, CmpRHS, CmpLHS, TLI, DL, DT, AC) ==
FalseVal) FalseVal)
return ReplaceInstUsesWith(SI, StripBinOpFlags(FalseVal)); return ReplaceInstUsesWith(SI, FalseVal);
} else if (Pred == ICmpInst::ICMP_NE) { } else if (Pred == ICmpInst::ICMP_NE) {
if (SimplifyWithOpReplaced(TrueVal, CmpLHS, CmpRHS, TLI, DL, DT, AC) == if (SimplifyWithOpReplaced(TrueVal, CmpLHS, CmpRHS, TLI, DL, DT, AC) ==
FalseVal || FalseVal ||
SimplifyWithOpReplaced(TrueVal, CmpRHS, CmpLHS, TLI, DL, DT, AC) == SimplifyWithOpReplaced(TrueVal, CmpRHS, CmpLHS, TLI, DL, DT, AC) ==
FalseVal) FalseVal)
return ReplaceInstUsesWith(SI, StripBinOpFlags(TrueVal)); return ReplaceInstUsesWith(SI, TrueVal);
if (SimplifyWithOpReplaced(FalseVal, CmpLHS, CmpRHS, TLI, DL, DT, AC) == if (SimplifyWithOpReplaced(FalseVal, CmpLHS, CmpRHS, TLI, DL, DT, AC) ==
TrueVal || TrueVal ||
SimplifyWithOpReplaced(FalseVal, CmpRHS, CmpLHS, TLI, DL, DT, AC) == SimplifyWithOpReplaced(FalseVal, CmpRHS, CmpLHS, TLI, DL, DT, AC) ==
TrueVal) TrueVal)
return ReplaceInstUsesWith(SI, StripBinOpFlags(TrueVal)); return ReplaceInstUsesWith(SI, TrueVal);
} }
// NOTE: if we wanted to, this is where to detect integer MIN/MAX // NOTE: if we wanted to, this is where to detect integer MIN/MAX

10
test/Transforms/InstCombine/select.ll
View File

@ -1532,13 +1532,3 @@ define i32 @test_max_of_min(i32 %a) {
%s1 = select i1 %c1, i32 %s0, i32 -1 %s1 = select i1 %c1, i32 %s0, i32 -1
ret i32 %s1 ret i32 %s1
} }
define i32 @PR23757(i32 %x) {
; CHECK-LABEL: @PR23757
; CHECK: %[[add:.*]] = add i32 %x, 1
; CHECK-NEXT: ret i32 %[[add]]
%cmp = icmp eq i32 %x, 2147483647
%add = add nsw i32 %x, 1
%sel = select i1 %cmp, i32 -2147483648, i32 %add
ret i32 %sel
}