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Also validate that the code generation of IntrinsicLowering for LLI works.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36175 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Reid Spencer 2007-04-16 21:52:56 +00:00
parent 4ccf462b99
commit b579650f01
1 changed files with 26 additions and 7 deletions
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33
test/CodeGen/Generic/bit-intrinsics.ll
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@ -1,15 +1,34 @@
; Make sure this testcase is supported by all code generators. Either the
; intrinsic is supported natively or IntrinsicLowering provides it.
; RUN: llvm-as < %s | llc
; RUN: llvm-as < %s > %t.bc
; RUN: lli --force-interpreter=true %t.bc
; RUN: llc %t.bc -o /dev/null -f
; XFAIL: *
declare i32 @llvm.bit.part.select.i32.i32(i32 %x, i32 %hi, i32 %lo)
declare i16 @llvm.bit.part.select.i16.i16(i16 %x, i32 %hi, i32 %lo)
define i32 @bit_part_select(i32 %A, i16 %B) {
%a = call i32 @llvm.bit.part.select.i32.i32(i32 %A, i32 8, i32 0)
%b = call i16 @llvm.bit.part.select.i16.i16(i16 %B, i32 8, i32 0)
declare i32 @llvm.part.set.i32.i32.i32(i32 %x, i32 %rep, i32 %hi, i32 %lo)
declare i16 @llvm.part.set.i16.i16.i16(i16 %x, i16 %rep, i32 %hi, i32 %lo)
define i32 @test_part_set(i32 %A, i16 %B) {
%a = call i32 @llvm.part.set.i32.i32.i32(i32 %A, i32 27, i32 8, i32 0)
%b = call i16 @llvm.part.set.i16.i16.i16(i16 %B, i16 27, i32 8, i32 0)
%c = zext i16 %b to i32
%d = add i32 %a, %c
ret i32 %d
}
declare i32 @llvm.part.select.i32.i32(i32 %x, i32 %hi, i32 %lo)
declare i16 @llvm.part.select.i16.i16(i16 %x, i32 %hi, i32 %lo)
define i32 @test_part_select(i32 %A, i16 %B) {
%a = call i32 @llvm.part.select.i32.i32(i32 %A, i32 8, i32 0)
%b = call i16 @llvm.part.select.i16.i16(i16 %B, i32 8, i32 0)
%c = zext i16 %b to i32
%d = add i32 %a, %c
ret i32 %d
}
define i32 @main(i32 %argc, i8** %argv) {
%a = call i32 @test_part_set(i32 23, i16 57)
%b = call i32 @test_part_select(i32 23, i16 57)
%c = add i32 %a, %b
%d = urem i32 %c, 1
ret i32 %d
}